From: benh@kernel.crashing.org (Benjamin Herrenschmidt)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 4/5] clk: aspeed: Register gated clocks
Date: Tue, 02 Jan 2018 16:46:55 +1100 [thread overview]
Message-ID: <1514872015.2743.130.camel@kernel.crashing.org> (raw)
In-Reply-To: <1514584997.2743.107.camel@kernel.crashing.org>
On Sat, 2017-12-30 at 09:03 +1100, Benjamin Herrenschmidt wrote:
> On Tue, 2017-12-26 at 17:32 -0800, Stephen Boyd wrote:
> > > I noticed we do have a few i2c based clock drivers... how are they ever
> > > supposed to work ? i2c bus controllers are allowed to sleep and the i2c
> > > core takes mutexes...
> >
> > We have clk_prepare()/clk_unprepare() for sleeping suckage. You
> > can use that, and i2c based clk drivers do that today.
>
> "suckage" ? Hehe ... the suckage should rather be stuff that cannot
> sleep. Arbitrary latencies and jitter caused by too much code wanting
> to be "atomic" when unnecessary are a bad thing.
>
> In the case of clocks like the aspeed where we have to wait for a
> rather long stabilization delay, way too long to legitimately do a non-
> sleepable delay with a lock held, do we need to do everything in
> prepare() then ?
BTW. Pls don't hold Joel's patches for this. Without that clk framework
a lot of the aspeed stuff already upstream doesn't actually work
without additional out-of-tree hacks or uboot black magic.
We can sort out the sleeping issues (and possibly move to using prepare
for the clocks that have that delay requirement) via subsequent
improvements.
Cheers,
Ben.
next prev parent reply other threads:[~2018-01-02 5:46 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-28 7:19 [PATCH v6 0/5] clk: Add Aspeed clock driver Joel Stanley
2017-11-28 7:19 ` [PATCH v6 1/5] clk: Add clock driver for ASPEED BMC SoCs Joel Stanley
2017-12-20 3:42 ` Joel Stanley
2017-11-28 7:19 ` [PATCH v6 2/5] clk: aspeed: Register core clocks Joel Stanley
2017-11-28 7:19 ` [PATCH v6 3/5] clk: aspeed: Add platform driver and register PLLs Joel Stanley
2017-11-28 7:19 ` [PATCH v6 4/5] clk: aspeed: Register gated clocks Joel Stanley
2017-12-21 23:39 ` Stephen Boyd
2017-12-22 2:36 ` Benjamin Herrenschmidt
2017-12-22 2:43 ` Benjamin Herrenschmidt
2017-12-27 1:32 ` Stephen Boyd
2017-12-29 22:03 ` Benjamin Herrenschmidt
2018-01-02 5:46 ` Benjamin Herrenschmidt [this message]
2018-01-02 18:16 ` Stephen Boyd
2017-11-28 7:19 ` [PATCH v6 5/5] clk: aspeed: Add reset controller Joel Stanley
2017-12-06 7:56 ` [PATCH v6 0/5] clk: Add Aspeed clock driver Joel Stanley
2017-12-21 23:40 ` Stephen Boyd
2017-12-22 1:42 ` Joel Stanley
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