From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 09/11] arm64: KVM: Make PSCI_VERSION a fast path
Date: Thu, 4 Jan 2018 15:08:33 +0000 [thread overview]
Message-ID: <1515078515-13723-10-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1515078515-13723-1-git-send-email-will.deacon@arm.com>
From: Marc Zyngier <marc.zyngier@arm.com>
For those CPUs that require PSCI to perform a BP invalidation,
going all the way to the PSCI code for not much is a waste of
precious cycles. Let's terminate that call as early as possible.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
arch/arm64/kvm/hyp/switch.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index 8d4f3c9d6dc4..4d273f6d0e69 100644
--- a/arch/arm64/kvm/hyp/switch.c
+++ b/arch/arm64/kvm/hyp/switch.c
@@ -17,6 +17,7 @@
#include <linux/types.h>
#include <linux/jump_label.h>
+#include <uapi/linux/psci.h>
#include <asm/kvm_asm.h>
#include <asm/kvm_emulate.h>
@@ -341,6 +342,18 @@ int __hyp_text __kvm_vcpu_run(struct kvm_vcpu *vcpu)
if (exit_code == ARM_EXCEPTION_TRAP && !__populate_fault_info(vcpu))
goto again;
+ if (exit_code == ARM_EXCEPTION_TRAP &&
+ (kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_HVC64 ||
+ kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_HVC32) &&
+ vcpu_get_reg(vcpu, 0) == PSCI_0_2_FN_PSCI_VERSION) {
+ u64 val = PSCI_RET_NOT_SUPPORTED;
+ if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
+ val = 2;
+
+ vcpu_set_reg(vcpu, 0, val);
+ goto again;
+ }
+
if (static_branch_unlikely(&vgic_v2_cpuif_trap) &&
exit_code == ARM_EXCEPTION_TRAP) {
bool valid;
--
2.1.4
next prev parent reply other threads:[~2018-01-04 15:08 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-04 15:08 [PATCH 00/11] arm64 kpti hardening and variant 2 workarounds Will Deacon
2018-01-04 15:08 ` [PATCH 01/11] arm64: use RET instruction for exiting the trampoline Will Deacon
2018-01-04 16:24 ` Ard Biesheuvel
2018-01-04 18:31 ` Will Deacon
2018-01-04 18:35 ` Ard Biesheuvel
2018-01-04 15:08 ` [PATCH 02/11] arm64: Kconfig: Reword UNMAP_KERNEL_AT_EL0 kconfig entry Will Deacon
2018-01-04 15:39 ` Christoph Hellwig
2018-01-04 15:08 ` [PATCH 03/11] arm64: Take into account ID_AA64PFR0_EL1.CSV3 Will Deacon
2018-01-04 23:15 ` Laura Abbott
2018-01-05 10:24 ` Suzuki K Poulose
2018-01-04 15:08 ` [PATCH 04/11] arm64: cpufeature: Pass capability structure to ->enable callback Will Deacon
2018-01-05 10:29 ` Suzuki K Poulose
2018-01-04 15:08 ` [PATCH 05/11] drivers/firmware: Expose psci_get_version through psci_ops structure Will Deacon
2018-01-04 16:10 ` Lorenzo Pieralisi
2018-01-04 15:08 ` [PATCH 06/11] arm64: Move post_ttbr_update_workaround to C code Will Deacon
2018-01-04 16:25 ` Ard Biesheuvel
2018-01-04 15:08 ` [PATCH 07/11] arm64: Add skeleton to harden the branch predictor against aliasing attacks Will Deacon
2018-01-04 15:08 ` [PATCH 08/11] arm64: KVM: Use per-CPU vector when BP hardening is enabled Will Deacon
2018-01-04 16:28 ` Ard Biesheuvel
2018-01-04 17:04 ` Marc Zyngier
2018-01-04 17:05 ` Ard Biesheuvel
2018-01-04 15:08 ` Will Deacon [this message]
2018-01-04 15:08 ` [PATCH 10/11] arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75 Will Deacon
2018-01-04 15:08 ` [PATCH 11/11] arm64: Implement branch predictor hardening for affected Cortex-A CPUs Will Deacon
2018-01-04 16:31 ` Ard Biesheuvel
2018-01-04 17:14 ` Marc Zyngier
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