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From: okaya@codeaurora.org (Sinan Kaya)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 2/2] MIPS: io: add a barrier after register read in readX()
Date: Tue,  3 Apr 2018 08:55:04 -0400	[thread overview]
Message-ID: <1522760109-16497-2-git-send-email-okaya@codeaurora.org> (raw)
In-Reply-To: <1522760109-16497-1-git-send-email-okaya@codeaurora.org>

While a barrier is present in writeX() function before the register write,
a similar barrier is missing in the readX() function after the register
read. This could allow memory accesses following readX() to observe
stale data.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Reported-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/mips/include/asm/io.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index fd00ddaf..6ac502f 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -377,6 +377,7 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem)	\
 		BUG();							\
 	}								\
 									\
+	rmb();								\
 	return pfx##ioswab##bwlq(__mem, __val);				\
 }
 
-- 
2.7.4

  reply	other threads:[~2018-04-03 12:55 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-03 12:55 [PATCH v3 1/2] MIPS: io: prevent compiler reordering on the default writeX() implementation Sinan Kaya
2018-04-03 12:55 ` Sinan Kaya [this message]
2018-04-06  1:34   ` [PATCH v3 2/2] MIPS: io: add a barrier after register read in readX() Sinan Kaya
2018-04-06 18:15     ` Sinan Kaya
2018-04-06 21:26       ` James Hogan
2018-04-07 21:43         ` Sinan Kaya
2018-04-11 17:10           ` Sinan Kaya
2018-04-11 20:26             ` James Hogan
2018-04-11 20:48               ` Sinan Kaya
2018-04-11 17:04         ` Maciej W. Rozycki
2018-04-12 21:51   ` James Hogan
2018-04-12 21:58     ` James Hogan
2018-04-12 22:38       ` Sinan Kaya
2018-04-12 22:20     ` Sinan Kaya
2018-04-13 15:41     ` David Laight
2018-04-13 16:36       ` Sinan Kaya

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