From: suzuki.poulose@arm.com (Suzuki K Poulose)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 03/11] coresight: tmc-etr: Do not clean trace buffer
Date: Fri, 18 May 2018 17:39:19 +0100 [thread overview]
Message-ID: <1526661567-4578-4-git-send-email-suzuki.poulose@arm.com> (raw)
In-Reply-To: <1526661567-4578-1-git-send-email-suzuki.poulose@arm.com>
We zero out the entire trace buffer used for ETR before it is enabled,
for helping with debugging. With the addition of scatter-gather mode,
the buffer could be bigger and non-contiguous.
Get rid of this step; if someone wants to debug, they can always add it
as and when needed.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
drivers/hwtracing/coresight/coresight-tmc-etr.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index d3c2b04..c73bcb3 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -24,9 +24,6 @@ static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
{
u32 axictl, sts;
- /* Zero out the memory to help with debug */
- memset(drvdata->vaddr, 0, drvdata->size);
-
CS_UNLOCK(drvdata->base);
/* Wait for TMCSReady bit to be set */
@@ -352,9 +349,8 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata)
if (drvdata->mode == CS_MODE_SYSFS) {
/*
* The trace run will continue with the same allocated trace
- * buffer. The trace buffer is cleared in tmc_etr_enable_hw(),
- * so we don't have to explicitly clear it. Also, since the
- * tracer is still enabled drvdata::buf can't be NULL.
+ * buffer. Since the tracer is still enabled drvdata::buf can't
+ * be NULL.
*/
tmc_etr_enable_hw(drvdata);
} else {
--
2.7.4
next prev parent reply other threads:[~2018-05-18 16:39 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-18 16:39 [PATCH 00/11] coresight: tmc-etr Transparent buffer management Suzuki K Poulose
2018-05-18 16:39 ` [PATCH 01/11] coresight: ETM: Add support for Arm Cortex-A73 and Cortex-A35 Suzuki K Poulose
2018-05-18 16:39 ` [PATCH 02/11] coresight: tmc: Hide trace buffer handling for file read Suzuki K Poulose
2018-05-18 16:39 ` Suzuki K Poulose [this message]
2018-05-18 16:39 ` [PATCH 04/11] coresight: tmc-etr: Disallow perf mode Suzuki K Poulose
2018-05-18 16:39 ` [PATCH 05/11] coresight: Add helper for inserting synchronization packets Suzuki K Poulose
2018-05-18 16:39 ` [PATCH 06/11] dts: bindings: Restrict coresight tmc-etr scatter-gather mode Suzuki K Poulose
2018-05-23 18:18 ` Rob Herring
2018-05-18 16:39 ` [PATCH 07/11] dts: juno: Add scatter-gather support for all revisions Suzuki K Poulose
2018-05-23 17:39 ` Mathieu Poirier
2018-05-18 16:39 ` [PATCH 08/11] coresight: Add generic TMC sg table framework Suzuki K Poulose
2018-05-23 20:25 ` Mathieu Poirier
2018-05-25 16:07 ` Suzuki K Poulose
2018-05-25 16:43 ` Mathieu Poirier
2018-05-25 16:54 ` Suzuki K Poulose
2018-05-18 16:39 ` [PATCH 09/11] coresight: Add support for TMC ETR SG unit Suzuki K Poulose
2018-05-18 16:39 ` [PATCH 10/11] coresight: tmc-etr: Add transparent buffer management Suzuki K Poulose
2018-05-24 19:56 ` Mathieu Poirier
2018-05-18 16:39 ` [PATCH 11/11] coresight: tmc: Add configuration support for trace buffer size Suzuki K Poulose
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