[PATCH v6 2/2] ARM: dts: imx: Add basic dts support for imx6sll EVK board

[PATCH v6 2/2] ARM: dts: imx: Add basic dts support for imx6sll EVK board

[Bai Ping]

Add dts file support for imx6sll EVK board.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 change v3->v4
 - update the license indentifier
 - remove leading zero of node
 - remove unused pin from hog group
 change v4->v5
 - use generic name for device node
 - remove unnecessary hog pin group
 change v5->v6
 - no
---
 Documentation/devicetree/bindings/arm/fsl.txt |   4 +
 arch/arm/boot/dts/Makefile                    |   2 +
 arch/arm/boot/dts/imx6sll-evk.dts             | 315 ++++++++++++++++++++++++++
 3 files changed, 321 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx6sll-evk.dts

diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index cdb9dd7..8a1baa2 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -53,6 +53,10 @@ i.MX6 Quad SABRE Automotive Board
 Required root node properties:
     - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
 
+i.MX6SLL EVK board
+Required root node properties:
+    - compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
+
 Generic i.MX boards
 -------------------
 
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f4753b0..f3fb85f 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -521,6 +521,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
 dtb-$(CONFIG_SOC_IMX6SL) += \
 	imx6sl-evk.dtb \
 	imx6sl-warp.dtb
+dtb-$(CONFIG_SOC_IMX6SLL) += \
+	imx6sll-evk.dtb
 dtb-$(CONFIG_SOC_IMX6SX) += \
 	imx6sx-nitrogen6sx.dtb \
 	imx6sx-sabreauto.dtb \
diff --git a/arch/arm/boot/dts/imx6sll-evk.dts b/arch/arm/boot/dts/imx6sll-evk.dts
new file mode 100644
index 0000000..0cfa4a2
--- /dev/null
+++ b/arch/arm/boot/dts/imx6sll-evk.dts
@@ -0,0 +1,315 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017-2018 NXP.
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "imx6sll.dtsi"
+
+/ {
+	model = "Freescale i.MX6SLL EVK Board";
+	compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
+
+	memory at 80000000 {
+		reg = <0x80000000 0x80000000>;
+	};
+
+	backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 5000000>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <6>;
+		status = "okay";
+	};
+
+	reg_usb_otg1_vbus: regulator-otg1-vbus {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usb_otg1_vbus>;
+		regulator-name = "usb_otg1_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	reg_usb_otg2_vbus: regulator-otg2-vbus {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usb_otg2_vbus>;
+		regulator-name = "usb_otg2_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	reg_aud3v: regulator-aud3v {
+		compatible = "regulator-fixed";
+		regulator-name = "wm8962-supply-3v15";
+		regulator-min-microvolt = <3150000>;
+		regulator-max-microvolt = <3150000>;
+		regulator-boot-on;
+	};
+
+	reg_aud4v: regulator-aud4v {
+		compatible = "regulator-fixed";
+		regulator-name = "wm8962-supply-4v2";
+		regulator-min-microvolt = <4325000>;
+		regulator-max-microvolt = <4325000>;
+		regulator-boot-on;
+	};
+
+	reg_lcd: regulator-lcd {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_reg_lcd>;
+		regulator-name = "lcd-pwr";
+		gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	reg_sd1_vmmc: regulator-sd1-vmmc {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_reg_sd1_vmmc>;
+		regulator-name = "SD1_SPWR";
+		regulator-min-microvolt = <3000000>;
+		regulator-max-microvolt = <3000000>;
+		gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+};
+
+&cpu0 {
+	arm-supply = <&sw1a_reg>;
+	soc-supply = <&sw1c_reg>;
+};
+
+&i2c1 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+
+	pfuze100: pmic at 8 {
+		compatible = "fsl,pfuze100";
+		reg = <0x08>;
+
+		regulators {
+			sw1a_reg: sw1ab {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw1c_reg: sw1c {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw2_reg: sw2 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw3a_reg: sw3a {
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1975000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw3b_reg: sw3b {
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1975000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw4_reg: sw4 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			swbst_reg: swbst {
+				regulator-min-microvolt = <5000000>;
+				regulator-max-microvolt = <5150000>;
+			};
+
+			snvs_reg: vsnvs {
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vref_reg: vrefddr {
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen1_reg: vgen1 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+				regulator-always-on;
+			};
+
+			vgen2_reg: vgen2 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+			};
+
+			vgen3_reg: vgen3 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vgen4_reg: vgen4 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen5_reg: vgen5 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen6_reg: vgen6 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&iomuxc {
+	pinctrl_usb_otg1_vbus: vbus1grp {
+		fsl,pins = <
+			MX6SLL_PAD_KEY_COL4__GPIO4_IO00 0x17059
+		>;
+	};
+
+	pinctrl_usb_otg2_vbus: vbus2grp {
+		fsl,pins = <
+			MX6SLL_PAD_KEY_COL5__GPIO4_IO02 0x17059
+		>;
+	};
+
+	pinctrl_reg_lcd: reglcdgrp {
+		fsl,pins = <
+			MX6SLL_PAD_ECSPI1_SCLK__GPIO4_IO08 0x17059
+		>;
+	};
+
+	pinctrl_reg_sd1_vmmc: sd1vmmcgrp {
+		fsl,pins = <
+			MX6SLL_PAD_KEY_COL3__GPIO3_IO30 0x17059
+		>;
+	};
+
+	pinctrl_uart1: uart1grp {
+		fsl,pins = <
+			MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1
+			MX6SLL_PAD_UART1_RXD__UART1_DCE_RX 0x1b0b1
+		>;
+	};
+
+	pinctrl_usdhc1: usdhc1grp {
+		fsl,pins = <
+			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x17059
+			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x13059
+			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x17059
+			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x17059
+			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x17059
+			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x17059
+		>;
+	};
+
+	pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
+		fsl,pins = <
+			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170b9
+			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x130b9
+			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x170b9
+			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x170b9
+			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x170b9
+			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x170b9
+		>;
+	};
+
+	pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
+		fsl,pins = <
+			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170f9
+			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x130f9
+			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x170f9
+			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x170f9
+			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x170f9
+			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x170f9
+		>;
+	};
+
+	pinctrl_usbotg1: usbotg1grp {
+		fsl,pins = <
+			MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059
+		>;
+	};
+
+	pinctrl_i2c1: i2c1grp {
+		fsl,pins = <
+			MX6SLL_PAD_I2C1_SCL__I2C1_SCL	 0x4001b8b1
+			MX6SLL_PAD_I2C1_SDA__I2C1_SDA	 0x4001b8b1
+		>;
+	};
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	status = "okay";
+};
+
+&usdhc1 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc1>;
+	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+	cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
+	wp-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
+	keep-power-in-suspend;
+	wakeup-source;
+	vmmc-supply = <&reg_sd1_vmmc>;
+	status = "okay";
+};
+
+&usbotg1 {
+	vbus-supply = <&reg_usb_otg1_vbus>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg1>;
+	disable-over-current;
+	srp-disable;
+	hnp-disable;
+	adp-disable;
+	status = "okay";
+};
+
+&usbotg2 {
+	vbus-supply = <&reg_usb_otg2_vbus>;
+	dr_mode = "host";
+	disable-over-current;
+	status = "okay";
+};
-- 
1.9.1

[PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll

[A.s. Dong]

> -----Original Message-----
> From: Jacky Bai
> Sent: Monday, May 21, 2018 6:47 PM
> To: shawnguo at kernel.org; robh+dt at kernel.org; kernel at pengutronix.de
> Cc: Fabio Estevam <fabio.estevam@nxp.com>; devicetree at vger.kernel.org;
> linux-arm-kernel at lists.infradead.org; dl-linux-imx <linux-imx@nxp.com>;
> A.s. Dong <aisheng.dong@nxp.com>; jacky.baip at gmail.com
> Subject: [PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll
> 

[...]

> +	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		cpu0: cpu at 0 {
> +			compatible = "arm,cortex-a9";
> +			device_type = "cpu";
> +			reg = <0>;
> +			next-level-cache = <&L2>;
> +			operating-points = <
> +				/* kHz    uV */
> +				996000  1275000
> +				792000  1175000
> +				396000  1075000
> +				198000	975000
> +			>;
> +			fsl,soc-operating-points = <
> +				/* ARM kHz      SOC-PU uV */
> +				996000          1175000
> +				792000          1175000
> +				396000          1175000
> +				198000		1175000
> +			>;
> +			clock-latency = <61036>; /* two CLK32 periods */
> +			clocks = <&clks IMX6SLL_CLK_ARM>,
> +				 <&clks IMX6SLL_CLK_PLL2_PFD2>,
> +				 <&clks IMX6SLL_CLK_STEP>,
> +				 <&clks IMX6SLL_CLK_PLL1_SW>,
> +				 <&clks IMX6SLL_CLK_PLL1_SYS>,
> +				 <&clks IMX6SLL_CLK_PLL1>,
> +				 <&clks IMX6SLL_PLL1_BYPASS>,
> +				 <&clks IMX6SLL_PLL1_BYPASS_SRC>;
> +			clock-names = "arm", "pll2_pfd2_396m", "step",
> +				      "pll1_sw", "pll1_sys", "pll1",
> +				      "pll1_bypass", "pll1_bypass_src";
> +		};

Please remove the unused pll1, pll1_bypass and pll1_bypass_src clocks.

> +	};
> +
> +	intc: interrupt-controller at a01000 {
> +		compatible = "arm,cortex-a9-gic";
> +		#interrupt-cells = <3>;
> +		interrupt-controller;
> +		reg = <0x00a01000 0x1000>,
> +		      <0x00a00100 0x100>;
> +		interrupt-parent = <&intc>;
> +	};
> +
> +	ckil: clock-ckil {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <32768>;
> +		clock-output-names = "ckil";
> +	};
> +
> +	osc: clock-osc-24m {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <24000000>;
> +		clock-output-names = "osc";
> +	};
> +

[...]

> +
> +			gpt1: timer at 2098000 {
> +				compatible = "fsl,imx6dl-gpt";

This looks strange as mx6sll is derived from mx6sl.
How about change to "fsl,imx6sl-gpt" which is already supported?

> +				reg = <0x02098000 0x4000>;
> +				interrupts = <GIC_SPI 55
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_GPT_BUS>,
> +					 <&clks IMX6SLL_CLK_GPT_SERIAL>;
> +				clock-names = "ipg", "per";
> +			};
> +

[...]

> +
> +			tempmon: temperature-sensor {
> +				compatible = "fsl,imx6sll-tempmon",
> "fsl,imx6sx-tempmon";
> +				interrupts = <GIC_SPI 49
> IRQ_TYPE_LEVEL_HIGH>;
> +				fsl,tempmon = <&anatop>;
> +				fsl,tempmon-data = <&ocotp>;
> +				clocks = <&clks
> IMX6SLL_CLK_PLL3_USB_OTG>;
> +				status = "disabled";
> +			};
> +

Pls move it out of SoC node to root node.
See:
commit 225fa59fddfa7 ("ARM: dts: imx7: Move tempmon node out of bus")

And probably we need switch to the new way?
See:
commit de25b9bb4a4 ("ARM: dts: imx7s: add temperature monitor support")

Otherwise:
Acked-by: Dong Aisheng <Aisheng.dong@nxp.com>

Regards
Dong Aisheng

> +			usbphy1: usb-phy at 20c9000 {
> +				compatible = "fsl,imx6sll-usbphy",
> "fsl,imx6ul-usbphy",
> +						"fsl,imx23-usbphy";
> +				reg = <0x020c9000 0x1000>;
> +				interrupts = <GIC_SPI 40
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_USBPHY1>;
> +				phy-3p0-supply = <&reg_3p0>;
> +				fsl,anatop = <&anatop>;
> +			};
> +
> +			usbphy2: usb-phy at 20ca000 {
> +				compatible = "fsl,imx6sll-usbphy",
> "fsl,imx6ul-usbphy",
> +						"fsl,imx23-usbphy";
> +				reg = <0x020ca000 0x1000>;
> +				interrupts = <GIC_SPI 41
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_USBPHY2>;
> +				phy-reg_3p0-supply = <&reg_3p0>;
> +				fsl,anatop = <&anatop>;
> +			};
> +
> +			snvs: snvs at 20cc000 {
> +				compatible = "fsl,sec-v4.0-mon", "syscon",
> "simple-mfd";
> +				reg = <0x020cc000 0x4000>;
> +
> +				snvs_rtc: snvs-rtc-lp {
> +					compatible = "fsl,sec-v4.0-mon-rtc-
> lp";
> +					regmap = <&snvs>;
> +					offset = <0x34>;
> +					interrupts = <GIC_SPI 19
> IRQ_TYPE_LEVEL_HIGH>,
> +						     <GIC_SPI 20
> IRQ_TYPE_LEVEL_HIGH>;
> +				};
> +
> +				snvs_poweroff: snvs-poweroff {
> +					compatible = "syscon-poweroff";
> +					regmap = <&snvs>;
> +					offset = <0x38>;
> +					mask = <0x61>;
> +				};
> +
> +				snvs_pwrkey: snvs-powerkey {
> +					compatible = "fsl,sec-v4.0-pwrkey";
> +					regmap = <&snvs>;
> +					interrupts = <GIC_SPI 4
> IRQ_TYPE_LEVEL_HIGH>;
> +					linux,keycode = <KEY_POWER>;
> +					wakeup-source;
> +				};
> +			};
> +
> +			src: reset-controller at 20d8000 {
> +				compatible = "fsl,imx6sll-src";
> +				reg = <0x020d8000 0x4000>;
> +				interrupts = <GIC_SPI 91
> IRQ_TYPE_LEVEL_HIGH>,
> +					     <GIC_SPI 96
> IRQ_TYPE_LEVEL_HIGH>;
> +				#reset-cells = <1>;
> +			};
> +
> +			gpc: interrupt-controller at 20dc000 {
> +				compatible = "fsl,imx6sll-gpc", "fsl,imx6q-
> gpc";
> +				reg = <0x020dc000 0x4000>;
> +				interrupt-controller;
> +				#interrupt-cells = <3>;
> +				interrupts = <GIC_SPI 89
> IRQ_TYPE_LEVEL_HIGH>;
> +				interrupt-parent = <&intc>;
> +				fsl,mf-mix-wakeup-irq = <0x7c00000 0x7d00
> 0x0 0x1400640>;
> +			};
> +
> +			iomuxc: pinctrl at 20e0000 {
> +				compatible = "fsl,imx6sll-iomuxc";
> +				reg = <0x020e0000 0x4000>;
> +			};
> +
> +			gpr: iomuxc-gpr at 20e4000 {
> +				compatible = "fsl,imx6sll-iomuxc-gpr",
> +					     "fsl,imx6q-iomuxc-gpr", "syscon";
> +				reg = <0x020e4000 0x4000>;
> +			};
> +
> +			csi: csi at 20e8000 {
> +				compatible = "fsl,imx6sll-csi", "fsl,imx6s-csi";
> +				reg = <0x020e8000 0x4000>;
> +				interrupts = <GIC_SPI 7
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_DUMMY>,
> +					 <&clks IMX6SLL_CLK_CSI>,
> +					 <&clks IMX6SLL_CLK_DUMMY>;
> +				clock-names = "disp-axi", "csi_mclk",
> "disp_dcic";
> +				status = "disabled";
> +			};
> +
> +			sdma: dma-controller at 20ec000 {
> +				compatible = "fsl,imx6sll-sdma", "fsl,imx35-
> sdma";
> +				reg = <0x020ec000 0x4000>;
> +				interrupts = <GIC_SPI 2
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_SDMA>,
> +					 <&clks IMX6SLL_CLK_SDMA>;
> +				clock-names = "ipg", "ahb";
> +				#dma-cells = <3>;
> +				iram = <&ocram>;
> +				fsl,sdma-ram-script-name =
> "imx/sdma/sdma-imx6q.bin";
> +			};
> +
> +			lcdif: lcd-controller at 20f8000 {
> +				compatible = "fsl,imx6sll-lcdif", "fsl,imx28-
> lcdif";
> +				reg = <0x020f8000 0x4000>;
> +				interrupts = <GIC_SPI 39
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_LCDIF_PIX>,
> +					 <&clks IMX6SLL_CLK_LCDIF_APB>,
> +					 <&clks IMX6SLL_CLK_DUMMY>;
> +				clock-names = "pix", "axi", "disp_axi";
> +				status = "disabled";
> +			};
> +
> +			dcp: dcp at 20fc000 {
> +				compatible = "fsl,imx28-dcp";
> +				reg = <0x020fc000 0x4000>;
> +				interrupts = <GIC_SPI 99
> IRQ_TYPE_LEVEL_HIGH>,
> +					     <GIC_SPI 100
> IRQ_TYPE_LEVEL_HIGH>,
> +					     <GIC_SPI 101
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_DCP>;
> +				clock-names = "dcp";
> +			};
> +		};
> +
> +		aips2: aips-bus at 2100000 {
> +			compatible = "fsl,aips-bus", "simple-bus";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			reg = <0x02100000 0x100000>;
> +			ranges;
> +
> +			usbotg1: usb at 2184000 {
> +				compatible = "fsl,imx6sll-usb", "fsl,imx6ul-
> usb",
> +						"fsl,imx27-usb";
> +				reg = <0x02184000 0x200>;
> +				interrupts = <GIC_SPI 43
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_USBOH3>;
> +				fsl,usbphy = <&usbphy1>;
> +				fsl,usbmisc = <&usbmisc 0>;
> +				fsl,anatop = <&anatop>;
> +				ahb-burst-config = <0x0>;
> +				tx-burst-size-dword = <0x10>;
> +				rx-burst-size-dword = <0x10>;
> +				status = "disabled";
> +			};
> +
> +			usbotg2: usb at 2184200 {
> +				compatible = "fsl,imx6sll-usb", "fsl,imx6ul-
> usb",
> +						"fsl,imx27-usb";
> +				reg = <0x02184200 0x200>;
> +				interrupts = <GIC_SPI 42
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_USBOH3>;
> +				fsl,usbphy = <&usbphy2>;
> +				fsl,usbmisc = <&usbmisc 1>;
> +				ahb-burst-config = <0x0>;
> +				tx-burst-size-dword = <0x10>;
> +				rx-burst-size-dword = <0x10>;
> +				status = "disabled";
> +			};
> +
> +			usbmisc: usbmisc at 2184800 {
> +				#index-cells = <1>;
> +				compatible = "fsl,imx6sll-usbmisc",
> "fsl,imx6ul-usbmisc",
> +						"fsl,imx6q-usbmisc";
> +				reg = <0x02184800 0x200>;
> +			};
> +
> +			usdhc1: mmc at 2190000 {
> +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> usdhc";
> +				reg = <0x02190000 0x4000>;
> +				interrupts = <GIC_SPI 22
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_USDHC1>,
> +					 <&clks IMX6SLL_CLK_USDHC1>,
> +					 <&clks IMX6SLL_CLK_USDHC1>;
> +				clock-names = "ipg", "ahb", "per";
> +				bus-width = <4>;
> +				fsl,tuning-step = <2>;
> +				fsl,tuning-start-tap = <20>;
> +				status = "disabled";
> +			};
> +
> +			usdhc2: mmc at 2194000 {
> +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> usdhc";
> +				reg = <0x02194000 0x4000>;
> +				interrupts = <GIC_SPI 23
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_USDHC2>,
> +					 <&clks IMX6SLL_CLK_USDHC2>,
> +					 <&clks IMX6SLL_CLK_USDHC2>;
> +				clock-names = "ipg", "ahb", "per";
> +				bus-width = <4>;
> +				fsl,tuning-step = <2>;
> +				fsl,tuning-start-tap = <20>;
> +				status = "disabled";
> +			};
> +
> +			usdhc3: mmc at 2198000 {
> +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> usdhc";
> +				reg = <0x02198000 0x4000>;
> +				interrupts = <GIC_SPI 24
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_USDHC3>,
> +					 <&clks IMX6SLL_CLK_USDHC3>,
> +					 <&clks IMX6SLL_CLK_USDHC3>;
> +				clock-names = "ipg", "ahb", "per";
> +				bus-width = <4>;
> +				fsl,tuning-step = <2>;
> +				fsl,tuning-start-tap = <20>;
> +				status = "disabled";
> +			};
> +
> +			i2c1: i2c at 21a0000 {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				compatible = "fs,imx6sll-i2c", "fsl,imx21-i2c";
> +				reg = <0x021a0000 0x4000>;
> +				interrupts = <GIC_SPI 36
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_I2C1>;
> +				status = "disabled";
> +			};
> +
> +			i2c2: i2c at 21a4000 {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
> +				reg = <0x021a4000 0x4000>;
> +				interrupts = <GIC_SPI 37
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_I2C2>;
> +				status = "disabled";
> +			};
> +
> +			i2c3: i2c at 21a8000 {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
> +				reg = <0x021a8000 0x4000>;
> +				interrupts = <GIC_SPI 38
> IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6SLL_CLK_I2C3>;
> +				status = "disabled";
> +			};
> +
> +			mmdc: memory-controller at 21b0000 {
> +				compatible = "fsl,imx6sll-mmdc", "fsl,imx6q-
> mmdc";
> +				reg = <0x021b0000 0x4000>;
> +			};
> +
> +			ocotp: ocotp-ctrl at 21bc000 {
> +				compatible = "fsl,imx6sll-ocotp", "syscon";
> +				reg = <0x021bc000 0x4000>;
> +				clocks = <&clks IMX6SLL_CLK_OCOTP>;
> +			};
> +
> +			audmux: audmux at 21d8000 {
> +				compatible = "fsl,imx6sll-audmux",
> "fsl,imx31-audmux";
> +				reg = <0x021d8000 0x4000>;
> +				status = "disabled";
> +			};
> +
> +			uart5: serial at 21f4000 {
> +				compatible = "fsl,imx6sll-uart", "fsl,imx6q-
> uart",
> +					     "fsl,imx21-uart";
> +				reg = <0x021f4000 0x4000>;
> +				interrupts =<GIC_SPI 30
> IRQ_TYPE_LEVEL_HIGH>;
> +				dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
> +				dma-names = "rx", "tx";
> +				clocks = <&clks IMX6SLL_CLK_UART5_IPG>,
> +					 <&clks
> IMX6SLL_CLK_UART5_SERIAL>;
> +				clock-names = "ipg", "per";
> +				status = "disabled";
> +			};
> +		};
> +	};
> +};
> --
> 1.9.1

[PATCH v6 2/2] ARM: dts: imx: Add basic dts support for imx6sll EVK board

[A.s. Dong]

> -----Original Message-----
> From: Jacky Bai
> Sent: Monday, May 21, 2018 6:47 PM
> To: shawnguo at kernel.org; robh+dt at kernel.org; kernel at pengutronix.de
> Cc: Fabio Estevam <fabio.estevam@nxp.com>; devicetree at vger.kernel.org;
> linux-arm-kernel at lists.infradead.org; dl-linux-imx <linux-imx@nxp.com>;
> A.s. Dong <aisheng.dong@nxp.com>; jacky.baip at gmail.com
> Subject: [PATCH v6 2/2] ARM: dts: imx: Add basic dts support for imx6sll EVK
> board
> 
> Add dts file support for imx6sll EVK board.
> 
> Signed-off-by: Bai Ping <ping.bai@nxp.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
>  change v3->v4
>  - update the license indentifier
>  - remove leading zero of node
>  - remove unused pin from hog group
>  change v4->v5
>  - use generic name for device node
>  - remove unnecessary hog pin group
>  change v5->v6
>  - no
> ---
>  Documentation/devicetree/bindings/arm/fsl.txt |   4 +
>  arch/arm/boot/dts/Makefile                    |   2 +
>  arch/arm/boot/dts/imx6sll-evk.dts             | 315
> ++++++++++++++++++++++++++
>  3 files changed, 321 insertions(+)
>  create mode 100644 arch/arm/boot/dts/imx6sll-evk.dts
> 
> diff --git a/Documentation/devicetree/bindings/arm/fsl.txt
> b/Documentation/devicetree/bindings/arm/fsl.txt
> index cdb9dd7..8a1baa2 100644
> --- a/Documentation/devicetree/bindings/arm/fsl.txt
> +++ b/Documentation/devicetree/bindings/arm/fsl.txt
> @@ -53,6 +53,10 @@ i.MX6 Quad SABRE Automotive Board  Required root
> node properties:
>      - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
> 
> +i.MX6SLL EVK board
> +Required root node properties:
> +    - compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
> +
>  Generic i.MX boards
>  -------------------
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index f4753b0..f3fb85f 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -521,6 +521,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
>  dtb-$(CONFIG_SOC_IMX6SL) += \
>  	imx6sl-evk.dtb \
>  	imx6sl-warp.dtb
> +dtb-$(CONFIG_SOC_IMX6SLL) += \
> +	imx6sll-evk.dtb
>  dtb-$(CONFIG_SOC_IMX6SX) += \
>  	imx6sx-nitrogen6sx.dtb \
>  	imx6sx-sabreauto.dtb \
> diff --git a/arch/arm/boot/dts/imx6sll-evk.dts b/arch/arm/boot/dts/imx6sll-
> evk.dts
> new file mode 100644
> index 0000000..0cfa4a2
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6sll-evk.dts
> @@ -0,0 +1,315 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright 2016 Freescale Semiconductor, Inc.
> + * Copyright 2017-2018 NXP.
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include "imx6sll.dtsi"
> +
> +/ {
> +	model = "Freescale i.MX6SLL EVK Board";
> +	compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
> +
> +	memory at 80000000 {
> +		reg = <0x80000000 0x80000000>;
> +	};
> +
> +	backlight {
> +		compatible = "pwm-backlight";
> +		pwms = <&pwm1 0 5000000>;
> +		brightness-levels = <0 4 8 16 32 64 128 255>;
> +		default-brightness-level = <6>;
> +		status = "okay";
> +	};
> +
> +	reg_usb_otg1_vbus: regulator-otg1-vbus {
> +		compatible = "regulator-fixed";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_usb_otg1_vbus>;
> +		regulator-name = "usb_otg1_vbus";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +
> +	reg_usb_otg2_vbus: regulator-otg2-vbus {
> +		compatible = "regulator-fixed";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_usb_otg2_vbus>;
> +		regulator-name = "usb_otg2_vbus";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +
> +	reg_aud3v: regulator-aud3v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "wm8962-supply-3v15";
> +		regulator-min-microvolt = <3150000>;
> +		regulator-max-microvolt = <3150000>;
> +		regulator-boot-on;
> +	};
> +
> +	reg_aud4v: regulator-aud4v {
> +		compatible = "regulator-fixed";
> +		regulator-name = "wm8962-supply-4v2";
> +		regulator-min-microvolt = <4325000>;
> +		regulator-max-microvolt = <4325000>;
> +		regulator-boot-on;
> +	};
> +
> +	reg_lcd: regulator-lcd {
> +		compatible = "regulator-fixed";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_reg_lcd>;
> +		regulator-name = "lcd-pwr";
> +		gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +
> +	reg_sd1_vmmc: regulator-sd1-vmmc {
> +		compatible = "regulator-fixed";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_reg_sd1_vmmc>;
> +		regulator-name = "SD1_SPWR";
> +		regulator-min-microvolt = <3000000>;
> +		regulator-max-microvolt = <3000000>;
> +		gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +};
> +
> +&cpu0 {
> +	arm-supply = <&sw1a_reg>;
> +	soc-supply = <&sw1c_reg>;
> +};
> +
> +&i2c1 {
> +	clock-frequency = <100000>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_i2c1>;
> +	status = "okay";
> +
> +	pfuze100: pmic at 8 {
> +		compatible = "fsl,pfuze100";
> +		reg = <0x08>;
> +
> +		regulators {
> +			sw1a_reg: sw1ab {
> +				regulator-min-microvolt = <300000>;
> +				regulator-max-microvolt = <1875000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +				regulator-ramp-delay = <6250>;
> +			};
> +
> +			sw1c_reg: sw1c {
> +				regulator-min-microvolt = <300000>;
> +				regulator-max-microvolt = <1875000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +				regulator-ramp-delay = <6250>;
> +			};
> +
> +			sw2_reg: sw2 {
> +				regulator-min-microvolt = <800000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			sw3a_reg: sw3a {
> +				regulator-min-microvolt = <400000>;
> +				regulator-max-microvolt = <1975000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			sw3b_reg: sw3b {
> +				regulator-min-microvolt = <400000>;
> +				regulator-max-microvolt = <1975000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			sw4_reg: sw4 {
> +				regulator-min-microvolt = <800000>;
> +				regulator-max-microvolt = <3300000>;
> +			};
> +
> +			swbst_reg: swbst {
> +				regulator-min-microvolt = <5000000>;
> +				regulator-max-microvolt = <5150000>;
> +			};
> +
> +			snvs_reg: vsnvs {
> +				regulator-min-microvolt = <1000000>;
> +				regulator-max-microvolt = <3000000>;
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			vref_reg: vrefddr {
> +				regulator-boot-on;
> +				regulator-always-on;
> +			};
> +
> +			vgen1_reg: vgen1 {
> +				regulator-min-microvolt = <800000>;
> +				regulator-max-microvolt = <1550000>;
> +				regulator-always-on;
> +			};
> +
> +			vgen2_reg: vgen2 {
> +				regulator-min-microvolt = <800000>;
> +				regulator-max-microvolt = <1550000>;
> +			};
> +
> +			vgen3_reg: vgen3 {
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <3300000>;
> +			};
> +
> +			vgen4_reg: vgen4 {
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +			};
> +
> +			vgen5_reg: vgen5 {
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +			};
> +
> +			vgen6_reg: vgen6 {
> +				regulator-min-microvolt = <1800000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +			};
> +		};
> +	};
> +};
> +
> +&iomuxc {
> +	pinctrl_usb_otg1_vbus: vbus1grp {
> +		fsl,pins = <
> +			MX6SLL_PAD_KEY_COL4__GPIO4_IO00 0x17059
> +		>;
> +	};
> +
> +	pinctrl_usb_otg2_vbus: vbus2grp {
> +		fsl,pins = <
> +			MX6SLL_PAD_KEY_COL5__GPIO4_IO02 0x17059
> +		>;
> +	};
> +
> +	pinctrl_reg_lcd: reglcdgrp {
> +		fsl,pins = <
> +			MX6SLL_PAD_ECSPI1_SCLK__GPIO4_IO08 0x17059
> +		>;
> +	};
> +
> +	pinctrl_reg_sd1_vmmc: sd1vmmcgrp {
> +		fsl,pins = <
> +			MX6SLL_PAD_KEY_COL3__GPIO3_IO30 0x17059
> +		>;
> +	};
> +
> +	pinctrl_uart1: uart1grp {
> +		fsl,pins = <
> +			MX6SLL_PAD_UART1_TXD__UART1_DCE_TX
> 0x1b0b1
> +			MX6SLL_PAD_UART1_RXD__UART1_DCE_RX
> 0x1b0b1
> +		>;
> +	};
> +
> +	pinctrl_usdhc1: usdhc1grp {
> +		fsl,pins = <
> +			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x17059
> +			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x13059
> +			MX6SLL_PAD_SD1_DATA0__SD1_DATA0
> 	0x17059
> +			MX6SLL_PAD_SD1_DATA1__SD1_DATA1
> 	0x17059
> +			MX6SLL_PAD_SD1_DATA2__SD1_DATA2
> 	0x17059
> +			MX6SLL_PAD_SD1_DATA3__SD1_DATA3
> 	0x17059
> +		>;
> +	};
> +
> +	pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
> +		fsl,pins = <
> +			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170b9
> +			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x130b9
> +			MX6SLL_PAD_SD1_DATA0__SD1_DATA0
> 	0x170b9
> +			MX6SLL_PAD_SD1_DATA1__SD1_DATA1
> 	0x170b9
> +			MX6SLL_PAD_SD1_DATA2__SD1_DATA2
> 	0x170b9
> +			MX6SLL_PAD_SD1_DATA3__SD1_DATA3
> 	0x170b9
> +		>;
> +	};
> +
> +	pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
> +		fsl,pins = <
> +			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170f9
> +			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x130f9
> +			MX6SLL_PAD_SD1_DATA0__SD1_DATA0
> 	0x170f9
> +			MX6SLL_PAD_SD1_DATA1__SD1_DATA1
> 	0x170f9
> +			MX6SLL_PAD_SD1_DATA2__SD1_DATA2
> 	0x170f9
> +			MX6SLL_PAD_SD1_DATA3__SD1_DATA3
> 	0x170f9
> +		>;
> +	};
> +
> +	pinctrl_usbotg1: usbotg1grp {
> +		fsl,pins = <
> +			MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID
> 0x17059
> +		>;
> +	};
> +
> +	pinctrl_i2c1: i2c1grp {
> +		fsl,pins = <
> +			MX6SLL_PAD_I2C1_SCL__I2C1_SCL	 0x4001b8b1
> +			MX6SLL_PAD_I2C1_SDA__I2C1_SDA	 0x4001b8b1
> +		>;
> +	};
> +};

Due to iomux node usually may expend largely, we choose better to put iomux node
at the end of this file to make other nodes easily looking.

Acked-by: Dong Aisheng <Aisheng.dong@nxp.com>

Regards
Dong Aisheng

> +
> +&uart1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart1>;
> +	status = "okay";
> +};
> +
> +&usdhc1 {
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc1>;
> +	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
> +	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
> +	cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
> +	wp-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
> +	keep-power-in-suspend;
> +	wakeup-source;
> +	vmmc-supply = <&reg_sd1_vmmc>;
> +	status = "okay";
> +};
> +
> +&usbotg1 {
> +	vbus-supply = <&reg_usb_otg1_vbus>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usbotg1>;
> +	disable-over-current;
> +	srp-disable;
> +	hnp-disable;
> +	adp-disable;
> +	status = "okay";
> +};
> +
> +&usbotg2 {
> +	vbus-supply = <&reg_usb_otg2_vbus>;
> +	dr_mode = "host";
> +	disable-over-current;
> +	status = "okay";
> +};
> --
> 1.9.1

[PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll

[Jacky Bai]

> Subject: RE: [PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll
> 
> > -----Original Message-----
> > From: Jacky Bai
> > Sent: Monday, May 21, 2018 6:47 PM
> > To: shawnguo at kernel.org; robh+dt at kernel.org; kernel at pengutronix.de
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>;
> devicetree at vger.kernel.org;
> > linux-arm-kernel at lists.infradead.org; dl-linux-imx
> > <linux-imx@nxp.com>; A.s. Dong <aisheng.dong@nxp.com>;
> > jacky.baip at gmail.com
> > Subject: [PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll
> >
> 
> [...]
> 
> [...]
> 
> > +
> > +			tempmon: temperature-sensor {
> > +				compatible = "fsl,imx6sll-tempmon",
> > "fsl,imx6sx-tempmon";
> > +				interrupts = <GIC_SPI 49
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				fsl,tempmon = <&anatop>;
> > +				fsl,tempmon-data = <&ocotp>;
> > +				clocks = <&clks
> > IMX6SLL_CLK_PLL3_USB_OTG>;
> > +				status = "disabled";
> > +			};
> > +
> 
> Pls move it out of SoC node to root node.
> See:
> commit 225fa59fddfa7 ("ARM: dts: imx7: Move tempmon node out of bus")
> 
Ok, will move it out.

> And probably we need switch to the new way?
> See:
> commit de25b9bb4a4 ("ARM: dts: imx7s: add temperature monitor support")
> 

I prefer to keep it same as other imx6 soc.

BR
Jacky Bai
> Otherwise:
> Acked-by: Dong Aisheng <Aisheng.dong@nxp.com>
> 
> Regards
> Dong Aisheng
> 
> > +			usbphy1: usb-phy at 20c9000 {
> > +				compatible = "fsl,imx6sll-usbphy",
> > "fsl,imx6ul-usbphy",
> > +						"fsl,imx23-usbphy";
> > +				reg = <0x020c9000 0x1000>;
> > +				interrupts = <GIC_SPI 40
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_USBPHY1>;
> > +				phy-3p0-supply = <&reg_3p0>;
> > +				fsl,anatop = <&anatop>;
> > +			};
> > +
> > +			usbphy2: usb-phy at 20ca000 {
> > +				compatible = "fsl,imx6sll-usbphy",
> > "fsl,imx6ul-usbphy",
> > +						"fsl,imx23-usbphy";
> > +				reg = <0x020ca000 0x1000>;
> > +				interrupts = <GIC_SPI 41
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_USBPHY2>;
> > +				phy-reg_3p0-supply = <&reg_3p0>;
> > +				fsl,anatop = <&anatop>;
> > +			};
> > +
> > +			snvs: snvs at 20cc000 {
> > +				compatible = "fsl,sec-v4.0-mon", "syscon",
> > "simple-mfd";
> > +				reg = <0x020cc000 0x4000>;
> > +
> > +				snvs_rtc: snvs-rtc-lp {
> > +					compatible = "fsl,sec-v4.0-mon-rtc-
> > lp";
> > +					regmap = <&snvs>;
> > +					offset = <0x34>;
> > +					interrupts = <GIC_SPI 19
> > IRQ_TYPE_LEVEL_HIGH>,
> > +						     <GIC_SPI 20
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				};
> > +
> > +				snvs_poweroff: snvs-poweroff {
> > +					compatible = "syscon-poweroff";
> > +					regmap = <&snvs>;
> > +					offset = <0x38>;
> > +					mask = <0x61>;
> > +				};
> > +
> > +				snvs_pwrkey: snvs-powerkey {
> > +					compatible = "fsl,sec-v4.0-pwrkey";
> > +					regmap = <&snvs>;
> > +					interrupts = <GIC_SPI 4
> > IRQ_TYPE_LEVEL_HIGH>;
> > +					linux,keycode = <KEY_POWER>;
> > +					wakeup-source;
> > +				};
> > +			};
> > +
> > +			src: reset-controller at 20d8000 {
> > +				compatible = "fsl,imx6sll-src";
> > +				reg = <0x020d8000 0x4000>;
> > +				interrupts = <GIC_SPI 91
> > IRQ_TYPE_LEVEL_HIGH>,
> > +					     <GIC_SPI 96
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				#reset-cells = <1>;
> > +			};
> > +
> > +			gpc: interrupt-controller at 20dc000 {
> > +				compatible = "fsl,imx6sll-gpc", "fsl,imx6q-
> > gpc";
> > +				reg = <0x020dc000 0x4000>;
> > +				interrupt-controller;
> > +				#interrupt-cells = <3>;
> > +				interrupts = <GIC_SPI 89
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				interrupt-parent = <&intc>;
> > +				fsl,mf-mix-wakeup-irq = <0x7c00000 0x7d00
> > 0x0 0x1400640>;
> > +			};
> > +
> > +			iomuxc: pinctrl at 20e0000 {
> > +				compatible = "fsl,imx6sll-iomuxc";
> > +				reg = <0x020e0000 0x4000>;
> > +			};
> > +
> > +			gpr: iomuxc-gpr at 20e4000 {
> > +				compatible = "fsl,imx6sll-iomuxc-gpr",
> > +					     "fsl,imx6q-iomuxc-gpr", "syscon";
> > +				reg = <0x020e4000 0x4000>;
> > +			};
> > +
> > +			csi: csi at 20e8000 {
> > +				compatible = "fsl,imx6sll-csi", "fsl,imx6s-csi";
> > +				reg = <0x020e8000 0x4000>;
> > +				interrupts = <GIC_SPI 7
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_DUMMY>,
> > +					 <&clks IMX6SLL_CLK_CSI>,
> > +					 <&clks IMX6SLL_CLK_DUMMY>;
> > +				clock-names = "disp-axi", "csi_mclk",
> > "disp_dcic";
> > +				status = "disabled";
> > +			};
> > +
> > +			sdma: dma-controller at 20ec000 {
> > +				compatible = "fsl,imx6sll-sdma", "fsl,imx35-
> > sdma";
> > +				reg = <0x020ec000 0x4000>;
> > +				interrupts = <GIC_SPI 2
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_SDMA>,
> > +					 <&clks IMX6SLL_CLK_SDMA>;
> > +				clock-names = "ipg", "ahb";
> > +				#dma-cells = <3>;
> > +				iram = <&ocram>;
> > +				fsl,sdma-ram-script-name =
> > "imx/sdma/sdma-imx6q.bin";
> > +			};
> > +
> > +			lcdif: lcd-controller at 20f8000 {
> > +				compatible = "fsl,imx6sll-lcdif", "fsl,imx28-
> > lcdif";
> > +				reg = <0x020f8000 0x4000>;
> > +				interrupts = <GIC_SPI 39
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_LCDIF_PIX>,
> > +					 <&clks IMX6SLL_CLK_LCDIF_APB>,
> > +					 <&clks IMX6SLL_CLK_DUMMY>;
> > +				clock-names = "pix", "axi", "disp_axi";
> > +				status = "disabled";
> > +			};
> > +
> > +			dcp: dcp at 20fc000 {
> > +				compatible = "fsl,imx28-dcp";
> > +				reg = <0x020fc000 0x4000>;
> > +				interrupts = <GIC_SPI 99
> > IRQ_TYPE_LEVEL_HIGH>,
> > +					     <GIC_SPI 100
> > IRQ_TYPE_LEVEL_HIGH>,
> > +					     <GIC_SPI 101
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_DCP>;
> > +				clock-names = "dcp";
> > +			};
> > +		};
> > +
> > +		aips2: aips-bus at 2100000 {
> > +			compatible = "fsl,aips-bus", "simple-bus";
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +			reg = <0x02100000 0x100000>;
> > +			ranges;
> > +
> > +			usbotg1: usb at 2184000 {
> > +				compatible = "fsl,imx6sll-usb", "fsl,imx6ul-
> > usb",
> > +						"fsl,imx27-usb";
> > +				reg = <0x02184000 0x200>;
> > +				interrupts = <GIC_SPI 43
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_USBOH3>;
> > +				fsl,usbphy = <&usbphy1>;
> > +				fsl,usbmisc = <&usbmisc 0>;
> > +				fsl,anatop = <&anatop>;
> > +				ahb-burst-config = <0x0>;
> > +				tx-burst-size-dword = <0x10>;
> > +				rx-burst-size-dword = <0x10>;
> > +				status = "disabled";
> > +			};
> > +
> > +			usbotg2: usb at 2184200 {
> > +				compatible = "fsl,imx6sll-usb", "fsl,imx6ul-
> > usb",
> > +						"fsl,imx27-usb";
> > +				reg = <0x02184200 0x200>;
> > +				interrupts = <GIC_SPI 42
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_USBOH3>;
> > +				fsl,usbphy = <&usbphy2>;
> > +				fsl,usbmisc = <&usbmisc 1>;
> > +				ahb-burst-config = <0x0>;
> > +				tx-burst-size-dword = <0x10>;
> > +				rx-burst-size-dword = <0x10>;
> > +				status = "disabled";
> > +			};
> > +
> > +			usbmisc: usbmisc at 2184800 {
> > +				#index-cells = <1>;
> > +				compatible = "fsl,imx6sll-usbmisc",
> > "fsl,imx6ul-usbmisc",
> > +						"fsl,imx6q-usbmisc";
> > +				reg = <0x02184800 0x200>;
> > +			};
> > +
> > +			usdhc1: mmc at 2190000 {
> > +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> > usdhc";
> > +				reg = <0x02190000 0x4000>;
> > +				interrupts = <GIC_SPI 22
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_USDHC1>,
> > +					 <&clks IMX6SLL_CLK_USDHC1>,
> > +					 <&clks IMX6SLL_CLK_USDHC1>;
> > +				clock-names = "ipg", "ahb", "per";
> > +				bus-width = <4>;
> > +				fsl,tuning-step = <2>;
> > +				fsl,tuning-start-tap = <20>;
> > +				status = "disabled";
> > +			};
> > +
> > +			usdhc2: mmc at 2194000 {
> > +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> > usdhc";
> > +				reg = <0x02194000 0x4000>;
> > +				interrupts = <GIC_SPI 23
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_USDHC2>,
> > +					 <&clks IMX6SLL_CLK_USDHC2>,
> > +					 <&clks IMX6SLL_CLK_USDHC2>;
> > +				clock-names = "ipg", "ahb", "per";
> > +				bus-width = <4>;
> > +				fsl,tuning-step = <2>;
> > +				fsl,tuning-start-tap = <20>;
> > +				status = "disabled";
> > +			};
> > +
> > +			usdhc3: mmc at 2198000 {
> > +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> > usdhc";
> > +				reg = <0x02198000 0x4000>;
> > +				interrupts = <GIC_SPI 24
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_USDHC3>,
> > +					 <&clks IMX6SLL_CLK_USDHC3>,
> > +					 <&clks IMX6SLL_CLK_USDHC3>;
> > +				clock-names = "ipg", "ahb", "per";
> > +				bus-width = <4>;
> > +				fsl,tuning-step = <2>;
> > +				fsl,tuning-start-tap = <20>;
> > +				status = "disabled";
> > +			};
> > +
> > +			i2c1: i2c at 21a0000 {
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +				compatible = "fs,imx6sll-i2c", "fsl,imx21-i2c";
> > +				reg = <0x021a0000 0x4000>;
> > +				interrupts = <GIC_SPI 36
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_I2C1>;
> > +				status = "disabled";
> > +			};
> > +
> > +			i2c2: i2c at 21a4000 {
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +				compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
> > +				reg = <0x021a4000 0x4000>;
> > +				interrupts = <GIC_SPI 37
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_I2C2>;
> > +				status = "disabled";
> > +			};
> > +
> > +			i2c3: i2c at 21a8000 {
> > +				#address-cells = <1>;
> > +				#size-cells = <0>;
> > +				compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
> > +				reg = <0x021a8000 0x4000>;
> > +				interrupts = <GIC_SPI 38
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&clks IMX6SLL_CLK_I2C3>;
> > +				status = "disabled";
> > +			};
> > +
> > +			mmdc: memory-controller at 21b0000 {
> > +				compatible = "fsl,imx6sll-mmdc", "fsl,imx6q-
> > mmdc";
> > +				reg = <0x021b0000 0x4000>;
> > +			};
> > +
> > +			ocotp: ocotp-ctrl at 21bc000 {
> > +				compatible = "fsl,imx6sll-ocotp", "syscon";
> > +				reg = <0x021bc000 0x4000>;
> > +				clocks = <&clks IMX6SLL_CLK_OCOTP>;
> > +			};
> > +
> > +			audmux: audmux at 21d8000 {
> > +				compatible = "fsl,imx6sll-audmux",
> > "fsl,imx31-audmux";
> > +				reg = <0x021d8000 0x4000>;
> > +				status = "disabled";
> > +			};
> > +
> > +			uart5: serial at 21f4000 {
> > +				compatible = "fsl,imx6sll-uart", "fsl,imx6q-
> > uart",
> > +					     "fsl,imx21-uart";
> > +				reg = <0x021f4000 0x4000>;
> > +				interrupts =<GIC_SPI 30
> > IRQ_TYPE_LEVEL_HIGH>;
> > +				dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
> > +				dma-names = "rx", "tx";
> > +				clocks = <&clks IMX6SLL_CLK_UART5_IPG>,
> > +					 <&clks
> > IMX6SLL_CLK_UART5_SERIAL>;
> > +				clock-names = "ipg", "per";
> > +				status = "disabled";
> > +			};
> > +		};
> > +	};
> > +};
> > --
> > 1.9.1

[PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll

[A.s. Dong]

Hi Jacky,

> -----Original Message-----
> From: Jacky Bai
> Sent: Friday, May 25, 2018 1:44 PM
> To: A.s. Dong <aisheng.dong@nxp.com>; shawnguo at kernel.org;
> robh+dt at kernel.org; kernel at pengutronix.de
> Cc: Fabio Estevam <fabio.estevam@nxp.com>; devicetree at vger.kernel.org;
> linux-arm-kernel at lists.infradead.org; dl-linux-imx <linux-imx@nxp.com>;
> jacky.baip at gmail.com
> Subject: RE: [PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll
> 
> > Subject: RE: [PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for
> > imx6sll
> >
> > > -----Original Message-----
> > > From: Jacky Bai
> > > Sent: Monday, May 21, 2018 6:47 PM
> > > To: shawnguo at kernel.org; robh+dt at kernel.org; kernel at pengutronix.de
> > > Cc: Fabio Estevam <fabio.estevam@nxp.com>;
> > devicetree at vger.kernel.org;
> > > linux-arm-kernel at lists.infradead.org; dl-linux-imx
> > > <linux-imx@nxp.com>; A.s. Dong <aisheng.dong@nxp.com>;
> > > jacky.baip at gmail.com
> > > Subject: [PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for
> > > imx6sll
> > >
> >
> > [...]
> >
> > [...]
> >
> > > +
> > > +			tempmon: temperature-sensor {
> > > +				compatible = "fsl,imx6sll-tempmon",
> > > "fsl,imx6sx-tempmon";
> > > +				interrupts = <GIC_SPI 49
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				fsl,tempmon = <&anatop>;
> > > +				fsl,tempmon-data = <&ocotp>;
> > > +				clocks = <&clks
> > > IMX6SLL_CLK_PLL3_USB_OTG>;
> > > +				status = "disabled";
> > > +			};
> > > +
> >
> > Pls move it out of SoC node to root node.
> > See:
> > commit 225fa59fddfa7 ("ARM: dts: imx7: Move tempmon node out of bus")
> >
> Ok, will move it out.
> 
> > And probably we need switch to the new way?
> > See:
> > commit de25b9bb4a4 ("ARM: dts: imx7s: add temperature monitor
> > support")
> >
> 
> I prefer to keep it same as other imx6 soc.
> 

Would you please check below patch?
commit a6c856e9a8c ("ARM: dts: imx6sx: Use nvmem-cells for tempmon")
If mx6sll has the same issue as mx6sx, then we may have to use nvmem-cells.

If not, I'm ok with old way.
And please make sure the OTP clk used is correct.

Regards
Dong Aisheng

> BR
> Jacky Bai
> > Otherwise:
> > Acked-by: Dong Aisheng <Aisheng.dong@nxp.com>
> >
> > Regards
> > Dong Aisheng
> >
> > > +			usbphy1: usb-phy at 20c9000 {
> > > +				compatible = "fsl,imx6sll-usbphy",
> > > "fsl,imx6ul-usbphy",
> > > +						"fsl,imx23-usbphy";
> > > +				reg = <0x020c9000 0x1000>;
> > > +				interrupts = <GIC_SPI 40
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_USBPHY1>;
> > > +				phy-3p0-supply = <&reg_3p0>;
> > > +				fsl,anatop = <&anatop>;
> > > +			};
> > > +
> > > +			usbphy2: usb-phy at 20ca000 {
> > > +				compatible = "fsl,imx6sll-usbphy",
> > > "fsl,imx6ul-usbphy",
> > > +						"fsl,imx23-usbphy";
> > > +				reg = <0x020ca000 0x1000>;
> > > +				interrupts = <GIC_SPI 41
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_USBPHY2>;
> > > +				phy-reg_3p0-supply = <&reg_3p0>;
> > > +				fsl,anatop = <&anatop>;
> > > +			};
> > > +
> > > +			snvs: snvs at 20cc000 {
> > > +				compatible = "fsl,sec-v4.0-mon", "syscon",
> > > "simple-mfd";
> > > +				reg = <0x020cc000 0x4000>;
> > > +
> > > +				snvs_rtc: snvs-rtc-lp {
> > > +					compatible = "fsl,sec-v4.0-mon-rtc-
> > > lp";
> > > +					regmap = <&snvs>;
> > > +					offset = <0x34>;
> > > +					interrupts = <GIC_SPI 19
> > > IRQ_TYPE_LEVEL_HIGH>,
> > > +						     <GIC_SPI 20
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				};
> > > +
> > > +				snvs_poweroff: snvs-poweroff {
> > > +					compatible = "syscon-poweroff";
> > > +					regmap = <&snvs>;
> > > +					offset = <0x38>;
> > > +					mask = <0x61>;
> > > +				};
> > > +
> > > +				snvs_pwrkey: snvs-powerkey {
> > > +					compatible = "fsl,sec-v4.0-pwrkey";
> > > +					regmap = <&snvs>;
> > > +					interrupts = <GIC_SPI 4
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +					linux,keycode = <KEY_POWER>;
> > > +					wakeup-source;
> > > +				};
> > > +			};
> > > +
> > > +			src: reset-controller at 20d8000 {
> > > +				compatible = "fsl,imx6sll-src";
> > > +				reg = <0x020d8000 0x4000>;
> > > +				interrupts = <GIC_SPI 91
> > > IRQ_TYPE_LEVEL_HIGH>,
> > > +					     <GIC_SPI 96
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				#reset-cells = <1>;
> > > +			};
> > > +
> > > +			gpc: interrupt-controller at 20dc000 {
> > > +				compatible = "fsl,imx6sll-gpc", "fsl,imx6q-
> > > gpc";
> > > +				reg = <0x020dc000 0x4000>;
> > > +				interrupt-controller;
> > > +				#interrupt-cells = <3>;
> > > +				interrupts = <GIC_SPI 89
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				interrupt-parent = <&intc>;
> > > +				fsl,mf-mix-wakeup-irq = <0x7c00000 0x7d00
> > > 0x0 0x1400640>;
> > > +			};
> > > +
> > > +			iomuxc: pinctrl at 20e0000 {
> > > +				compatible = "fsl,imx6sll-iomuxc";
> > > +				reg = <0x020e0000 0x4000>;
> > > +			};
> > > +
> > > +			gpr: iomuxc-gpr at 20e4000 {
> > > +				compatible = "fsl,imx6sll-iomuxc-gpr",
> > > +					     "fsl,imx6q-iomuxc-gpr", "syscon";
> > > +				reg = <0x020e4000 0x4000>;
> > > +			};
> > > +
> > > +			csi: csi at 20e8000 {
> > > +				compatible = "fsl,imx6sll-csi", "fsl,imx6s-csi";
> > > +				reg = <0x020e8000 0x4000>;
> > > +				interrupts = <GIC_SPI 7
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_DUMMY>,
> > > +					 <&clks IMX6SLL_CLK_CSI>,
> > > +					 <&clks IMX6SLL_CLK_DUMMY>;
> > > +				clock-names = "disp-axi", "csi_mclk",
> > > "disp_dcic";
> > > +				status = "disabled";
> > > +			};
> > > +
> > > +			sdma: dma-controller at 20ec000 {
> > > +				compatible = "fsl,imx6sll-sdma", "fsl,imx35-
> > > sdma";
> > > +				reg = <0x020ec000 0x4000>;
> > > +				interrupts = <GIC_SPI 2
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_SDMA>,
> > > +					 <&clks IMX6SLL_CLK_SDMA>;
> > > +				clock-names = "ipg", "ahb";
> > > +				#dma-cells = <3>;
> > > +				iram = <&ocram>;
> > > +				fsl,sdma-ram-script-name =
> > > "imx/sdma/sdma-imx6q.bin";
> > > +			};
> > > +
> > > +			lcdif: lcd-controller at 20f8000 {
> > > +				compatible = "fsl,imx6sll-lcdif", "fsl,imx28-
> > > lcdif";
> > > +				reg = <0x020f8000 0x4000>;
> > > +				interrupts = <GIC_SPI 39
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_LCDIF_PIX>,
> > > +					 <&clks IMX6SLL_CLK_LCDIF_APB>,
> > > +					 <&clks IMX6SLL_CLK_DUMMY>;
> > > +				clock-names = "pix", "axi", "disp_axi";
> > > +				status = "disabled";
> > > +			};
> > > +
> > > +			dcp: dcp at 20fc000 {
> > > +				compatible = "fsl,imx28-dcp";
> > > +				reg = <0x020fc000 0x4000>;
> > > +				interrupts = <GIC_SPI 99
> > > IRQ_TYPE_LEVEL_HIGH>,
> > > +					     <GIC_SPI 100
> > > IRQ_TYPE_LEVEL_HIGH>,
> > > +					     <GIC_SPI 101
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_DCP>;
> > > +				clock-names = "dcp";
> > > +			};
> > > +		};
> > > +
> > > +		aips2: aips-bus at 2100000 {
> > > +			compatible = "fsl,aips-bus", "simple-bus";
> > > +			#address-cells = <1>;
> > > +			#size-cells = <1>;
> > > +			reg = <0x02100000 0x100000>;
> > > +			ranges;
> > > +
> > > +			usbotg1: usb at 2184000 {
> > > +				compatible = "fsl,imx6sll-usb", "fsl,imx6ul-
> > > usb",
> > > +						"fsl,imx27-usb";
> > > +				reg = <0x02184000 0x200>;
> > > +				interrupts = <GIC_SPI 43
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_USBOH3>;
> > > +				fsl,usbphy = <&usbphy1>;
> > > +				fsl,usbmisc = <&usbmisc 0>;
> > > +				fsl,anatop = <&anatop>;
> > > +				ahb-burst-config = <0x0>;
> > > +				tx-burst-size-dword = <0x10>;
> > > +				rx-burst-size-dword = <0x10>;
> > > +				status = "disabled";
> > > +			};
> > > +
> > > +			usbotg2: usb at 2184200 {
> > > +				compatible = "fsl,imx6sll-usb", "fsl,imx6ul-
> > > usb",
> > > +						"fsl,imx27-usb";
> > > +				reg = <0x02184200 0x200>;
> > > +				interrupts = <GIC_SPI 42
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_USBOH3>;
> > > +				fsl,usbphy = <&usbphy2>;
> > > +				fsl,usbmisc = <&usbmisc 1>;
> > > +				ahb-burst-config = <0x0>;
> > > +				tx-burst-size-dword = <0x10>;
> > > +				rx-burst-size-dword = <0x10>;
> > > +				status = "disabled";
> > > +			};
> > > +
> > > +			usbmisc: usbmisc at 2184800 {
> > > +				#index-cells = <1>;
> > > +				compatible = "fsl,imx6sll-usbmisc",
> > > "fsl,imx6ul-usbmisc",
> > > +						"fsl,imx6q-usbmisc";
> > > +				reg = <0x02184800 0x200>;
> > > +			};
> > > +
> > > +			usdhc1: mmc at 2190000 {
> > > +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> > > usdhc";
> > > +				reg = <0x02190000 0x4000>;
> > > +				interrupts = <GIC_SPI 22
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_USDHC1>,
> > > +					 <&clks IMX6SLL_CLK_USDHC1>,
> > > +					 <&clks IMX6SLL_CLK_USDHC1>;
> > > +				clock-names = "ipg", "ahb", "per";
> > > +				bus-width = <4>;
> > > +				fsl,tuning-step = <2>;
> > > +				fsl,tuning-start-tap = <20>;
> > > +				status = "disabled";
> > > +			};
> > > +
> > > +			usdhc2: mmc at 2194000 {
> > > +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> > > usdhc";
> > > +				reg = <0x02194000 0x4000>;
> > > +				interrupts = <GIC_SPI 23
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_USDHC2>,
> > > +					 <&clks IMX6SLL_CLK_USDHC2>,
> > > +					 <&clks IMX6SLL_CLK_USDHC2>;
> > > +				clock-names = "ipg", "ahb", "per";
> > > +				bus-width = <4>;
> > > +				fsl,tuning-step = <2>;
> > > +				fsl,tuning-start-tap = <20>;
> > > +				status = "disabled";
> > > +			};
> > > +
> > > +			usdhc3: mmc at 2198000 {
> > > +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> > > usdhc";
> > > +				reg = <0x02198000 0x4000>;
> > > +				interrupts = <GIC_SPI 24
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_USDHC3>,
> > > +					 <&clks IMX6SLL_CLK_USDHC3>,
> > > +					 <&clks IMX6SLL_CLK_USDHC3>;
> > > +				clock-names = "ipg", "ahb", "per";
> > > +				bus-width = <4>;
> > > +				fsl,tuning-step = <2>;
> > > +				fsl,tuning-start-tap = <20>;
> > > +				status = "disabled";
> > > +			};
> > > +
> > > +			i2c1: i2c at 21a0000 {
> > > +				#address-cells = <1>;
> > > +				#size-cells = <0>;
> > > +				compatible = "fs,imx6sll-i2c", "fsl,imx21-i2c";
> > > +				reg = <0x021a0000 0x4000>;
> > > +				interrupts = <GIC_SPI 36
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_I2C1>;
> > > +				status = "disabled";
> > > +			};
> > > +
> > > +			i2c2: i2c at 21a4000 {
> > > +				#address-cells = <1>;
> > > +				#size-cells = <0>;
> > > +				compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
> > > +				reg = <0x021a4000 0x4000>;
> > > +				interrupts = <GIC_SPI 37
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_I2C2>;
> > > +				status = "disabled";
> > > +			};
> > > +
> > > +			i2c3: i2c at 21a8000 {
> > > +				#address-cells = <1>;
> > > +				#size-cells = <0>;
> > > +				compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
> > > +				reg = <0x021a8000 0x4000>;
> > > +				interrupts = <GIC_SPI 38
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				clocks = <&clks IMX6SLL_CLK_I2C3>;
> > > +				status = "disabled";
> > > +			};
> > > +
> > > +			mmdc: memory-controller at 21b0000 {
> > > +				compatible = "fsl,imx6sll-mmdc", "fsl,imx6q-
> > > mmdc";
> > > +				reg = <0x021b0000 0x4000>;
> > > +			};
> > > +
> > > +			ocotp: ocotp-ctrl at 21bc000 {
> > > +				compatible = "fsl,imx6sll-ocotp", "syscon";
> > > +				reg = <0x021bc000 0x4000>;
> > > +				clocks = <&clks IMX6SLL_CLK_OCOTP>;
> > > +			};
> > > +
> > > +			audmux: audmux at 21d8000 {
> > > +				compatible = "fsl,imx6sll-audmux",
> > > "fsl,imx31-audmux";
> > > +				reg = <0x021d8000 0x4000>;
> > > +				status = "disabled";
> > > +			};
> > > +
> > > +			uart5: serial at 21f4000 {
> > > +				compatible = "fsl,imx6sll-uart", "fsl,imx6q-
> > > uart",
> > > +					     "fsl,imx21-uart";
> > > +				reg = <0x021f4000 0x4000>;
> > > +				interrupts =<GIC_SPI 30
> > > IRQ_TYPE_LEVEL_HIGH>;
> > > +				dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
> > > +				dma-names = "rx", "tx";
> > > +				clocks = <&clks IMX6SLL_CLK_UART5_IPG>,
> > > +					 <&clks
> > > IMX6SLL_CLK_UART5_SERIAL>;
> > > +				clock-names = "ipg", "per";
> > > +				status = "disabled";
> > > +			};
> > > +		};
> > > +	};
> > > +};
> > > --
> > > 1.9.1

[PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll

[Jacky Bai]

> Subject: RE: [PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for imx6sll
> 
> Hi Jacky,
> 
> > -----Original Message-----
> > From: Jacky Bai
> > Sent: Friday, May 25, 2018 1:44 PM
> > To: A.s. Dong <aisheng.dong@nxp.com>; shawnguo at kernel.org;
> > robh+dt at kernel.org; kernel at pengutronix.de
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>;
> devicetree at vger.kernel.org;
> > linux-arm-kernel at lists.infradead.org; dl-linux-imx
> > <linux-imx@nxp.com>; jacky.baip at gmail.com
> > Subject: RE: [PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for
> > imx6sll
> >
> > > Subject: RE: [PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for
> > > imx6sll
> > >
> > > > -----Original Message-----
> > > > From: Jacky Bai
> > > > Sent: Monday, May 21, 2018 6:47 PM
> > > > To: shawnguo at kernel.org; robh+dt at kernel.org;
> kernel at pengutronix.de
> > > > Cc: Fabio Estevam <fabio.estevam@nxp.com>;
> > > devicetree at vger.kernel.org;
> > > > linux-arm-kernel at lists.infradead.org; dl-linux-imx
> > > > <linux-imx@nxp.com>; A.s. Dong <aisheng.dong@nxp.com>;
> > > > jacky.baip at gmail.com
> > > > Subject: [PATCH v6 1/2] ARM: dts: imx: Add basic dtsi file for
> > > > imx6sll
> > > >
> > >
> > > [...]
> > >
> > > [...]
> > >
> > > > +
> > > > +			tempmon: temperature-sensor {
> > > > +				compatible = "fsl,imx6sll-tempmon",
> > > > "fsl,imx6sx-tempmon";
> > > > +				interrupts = <GIC_SPI 49
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				fsl,tempmon = <&anatop>;
> > > > +				fsl,tempmon-data = <&ocotp>;
> > > > +				clocks = <&clks
> > > > IMX6SLL_CLK_PLL3_USB_OTG>;
> > > > +				status = "disabled";
> > > > +			};
> > > > +
> > >
> > > Pls move it out of SoC node to root node.
> > > See:
> > > commit 225fa59fddfa7 ("ARM: dts: imx7: Move tempmon node out of
> > > bus")
> > >
> > Ok, will move it out.
> >
> > > And probably we need switch to the new way?
> > > See:
> > > commit de25b9bb4a4 ("ARM: dts: imx7s: add temperature monitor
> > > support")
> > >
> >
> > I prefer to keep it same as other imx6 soc.
> >
> 
> Would you please check below patch?
> commit a6c856e9a8c ("ARM: dts: imx6sx: Use nvmem-cells for tempmon") If
> mx6sll has the same issue as mx6sx, then we may have to use nvmem-cells.
> 
> If not, I'm ok with old way.
> And please make sure the OTP clk used is correct.

OK, I will switch to the new way.

BR
Jacky Bai
> 
> Regards
> Dong Aisheng
> 
> > BR
> > Jacky Bai
> > > Otherwise:
> > > Acked-by: Dong Aisheng <Aisheng.dong@nxp.com>
> > >
> > > Regards
> > > Dong Aisheng
> > >
> > > > +			usbphy1: usb-phy at 20c9000 {
> > > > +				compatible = "fsl,imx6sll-usbphy",
> > > > "fsl,imx6ul-usbphy",
> > > > +						"fsl,imx23-usbphy";
> > > > +				reg = <0x020c9000 0x1000>;
> > > > +				interrupts = <GIC_SPI 40
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_USBPHY1>;
> > > > +				phy-3p0-supply = <&reg_3p0>;
> > > > +				fsl,anatop = <&anatop>;
> > > > +			};
> > > > +
> > > > +			usbphy2: usb-phy at 20ca000 {
> > > > +				compatible = "fsl,imx6sll-usbphy",
> > > > "fsl,imx6ul-usbphy",
> > > > +						"fsl,imx23-usbphy";
> > > > +				reg = <0x020ca000 0x1000>;
> > > > +				interrupts = <GIC_SPI 41
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_USBPHY2>;
> > > > +				phy-reg_3p0-supply = <&reg_3p0>;
> > > > +				fsl,anatop = <&anatop>;
> > > > +			};
> > > > +
> > > > +			snvs: snvs at 20cc000 {
> > > > +				compatible = "fsl,sec-v4.0-mon", "syscon",
> > > > "simple-mfd";
> > > > +				reg = <0x020cc000 0x4000>;
> > > > +
> > > > +				snvs_rtc: snvs-rtc-lp {
> > > > +					compatible = "fsl,sec-v4.0-mon-rtc-
> > > > lp";
> > > > +					regmap = <&snvs>;
> > > > +					offset = <0x34>;
> > > > +					interrupts = <GIC_SPI 19
> > > > IRQ_TYPE_LEVEL_HIGH>,
> > > > +						     <GIC_SPI 20
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				};
> > > > +
> > > > +				snvs_poweroff: snvs-poweroff {
> > > > +					compatible = "syscon-poweroff";
> > > > +					regmap = <&snvs>;
> > > > +					offset = <0x38>;
> > > > +					mask = <0x61>;
> > > > +				};
> > > > +
> > > > +				snvs_pwrkey: snvs-powerkey {
> > > > +					compatible = "fsl,sec-v4.0-pwrkey";
> > > > +					regmap = <&snvs>;
> > > > +					interrupts = <GIC_SPI 4
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +					linux,keycode = <KEY_POWER>;
> > > > +					wakeup-source;
> > > > +				};
> > > > +			};
> > > > +
> > > > +			src: reset-controller at 20d8000 {
> > > > +				compatible = "fsl,imx6sll-src";
> > > > +				reg = <0x020d8000 0x4000>;
> > > > +				interrupts = <GIC_SPI 91
> > > > IRQ_TYPE_LEVEL_HIGH>,
> > > > +					     <GIC_SPI 96
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				#reset-cells = <1>;
> > > > +			};
> > > > +
> > > > +			gpc: interrupt-controller at 20dc000 {
> > > > +				compatible = "fsl,imx6sll-gpc", "fsl,imx6q-
> > > > gpc";
> > > > +				reg = <0x020dc000 0x4000>;
> > > > +				interrupt-controller;
> > > > +				#interrupt-cells = <3>;
> > > > +				interrupts = <GIC_SPI 89
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				interrupt-parent = <&intc>;
> > > > +				fsl,mf-mix-wakeup-irq = <0x7c00000 0x7d00
> > > > 0x0 0x1400640>;
> > > > +			};
> > > > +
> > > > +			iomuxc: pinctrl at 20e0000 {
> > > > +				compatible = "fsl,imx6sll-iomuxc";
> > > > +				reg = <0x020e0000 0x4000>;
> > > > +			};
> > > > +
> > > > +			gpr: iomuxc-gpr at 20e4000 {
> > > > +				compatible = "fsl,imx6sll-iomuxc-gpr",
> > > > +					     "fsl,imx6q-iomuxc-gpr", "syscon";
> > > > +				reg = <0x020e4000 0x4000>;
> > > > +			};
> > > > +
> > > > +			csi: csi at 20e8000 {
> > > > +				compatible = "fsl,imx6sll-csi", "fsl,imx6s-csi";
> > > > +				reg = <0x020e8000 0x4000>;
> > > > +				interrupts = <GIC_SPI 7
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_DUMMY>,
> > > > +					 <&clks IMX6SLL_CLK_CSI>,
> > > > +					 <&clks IMX6SLL_CLK_DUMMY>;
> > > > +				clock-names = "disp-axi", "csi_mclk",
> > > > "disp_dcic";
> > > > +				status = "disabled";
> > > > +			};
> > > > +
> > > > +			sdma: dma-controller at 20ec000 {
> > > > +				compatible = "fsl,imx6sll-sdma", "fsl,imx35-
> > > > sdma";
> > > > +				reg = <0x020ec000 0x4000>;
> > > > +				interrupts = <GIC_SPI 2
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_SDMA>,
> > > > +					 <&clks IMX6SLL_CLK_SDMA>;
> > > > +				clock-names = "ipg", "ahb";
> > > > +				#dma-cells = <3>;
> > > > +				iram = <&ocram>;
> > > > +				fsl,sdma-ram-script-name =
> > > > "imx/sdma/sdma-imx6q.bin";
> > > > +			};
> > > > +
> > > > +			lcdif: lcd-controller at 20f8000 {
> > > > +				compatible = "fsl,imx6sll-lcdif", "fsl,imx28-
> > > > lcdif";
> > > > +				reg = <0x020f8000 0x4000>;
> > > > +				interrupts = <GIC_SPI 39
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_LCDIF_PIX>,
> > > > +					 <&clks IMX6SLL_CLK_LCDIF_APB>,
> > > > +					 <&clks IMX6SLL_CLK_DUMMY>;
> > > > +				clock-names = "pix", "axi", "disp_axi";
> > > > +				status = "disabled";
> > > > +			};
> > > > +
> > > > +			dcp: dcp at 20fc000 {
> > > > +				compatible = "fsl,imx28-dcp";
> > > > +				reg = <0x020fc000 0x4000>;
> > > > +				interrupts = <GIC_SPI 99
> > > > IRQ_TYPE_LEVEL_HIGH>,
> > > > +					     <GIC_SPI 100
> > > > IRQ_TYPE_LEVEL_HIGH>,
> > > > +					     <GIC_SPI 101
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_DCP>;
> > > > +				clock-names = "dcp";
> > > > +			};
> > > > +		};
> > > > +
> > > > +		aips2: aips-bus at 2100000 {
> > > > +			compatible = "fsl,aips-bus", "simple-bus";
> > > > +			#address-cells = <1>;
> > > > +			#size-cells = <1>;
> > > > +			reg = <0x02100000 0x100000>;
> > > > +			ranges;
> > > > +
> > > > +			usbotg1: usb at 2184000 {
> > > > +				compatible = "fsl,imx6sll-usb", "fsl,imx6ul-
> > > > usb",
> > > > +						"fsl,imx27-usb";
> > > > +				reg = <0x02184000 0x200>;
> > > > +				interrupts = <GIC_SPI 43
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_USBOH3>;
> > > > +				fsl,usbphy = <&usbphy1>;
> > > > +				fsl,usbmisc = <&usbmisc 0>;
> > > > +				fsl,anatop = <&anatop>;
> > > > +				ahb-burst-config = <0x0>;
> > > > +				tx-burst-size-dword = <0x10>;
> > > > +				rx-burst-size-dword = <0x10>;
> > > > +				status = "disabled";
> > > > +			};
> > > > +
> > > > +			usbotg2: usb at 2184200 {
> > > > +				compatible = "fsl,imx6sll-usb", "fsl,imx6ul-
> > > > usb",
> > > > +						"fsl,imx27-usb";
> > > > +				reg = <0x02184200 0x200>;
> > > > +				interrupts = <GIC_SPI 42
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_USBOH3>;
> > > > +				fsl,usbphy = <&usbphy2>;
> > > > +				fsl,usbmisc = <&usbmisc 1>;
> > > > +				ahb-burst-config = <0x0>;
> > > > +				tx-burst-size-dword = <0x10>;
> > > > +				rx-burst-size-dword = <0x10>;
> > > > +				status = "disabled";
> > > > +			};
> > > > +
> > > > +			usbmisc: usbmisc at 2184800 {
> > > > +				#index-cells = <1>;
> > > > +				compatible = "fsl,imx6sll-usbmisc",
> > > > "fsl,imx6ul-usbmisc",
> > > > +						"fsl,imx6q-usbmisc";
> > > > +				reg = <0x02184800 0x200>;
> > > > +			};
> > > > +
> > > > +			usdhc1: mmc at 2190000 {
> > > > +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> > > > usdhc";
> > > > +				reg = <0x02190000 0x4000>;
> > > > +				interrupts = <GIC_SPI 22
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_USDHC1>,
> > > > +					 <&clks IMX6SLL_CLK_USDHC1>,
> > > > +					 <&clks IMX6SLL_CLK_USDHC1>;
> > > > +				clock-names = "ipg", "ahb", "per";
> > > > +				bus-width = <4>;
> > > > +				fsl,tuning-step = <2>;
> > > > +				fsl,tuning-start-tap = <20>;
> > > > +				status = "disabled";
> > > > +			};
> > > > +
> > > > +			usdhc2: mmc at 2194000 {
> > > > +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> > > > usdhc";
> > > > +				reg = <0x02194000 0x4000>;
> > > > +				interrupts = <GIC_SPI 23
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_USDHC2>,
> > > > +					 <&clks IMX6SLL_CLK_USDHC2>,
> > > > +					 <&clks IMX6SLL_CLK_USDHC2>;
> > > > +				clock-names = "ipg", "ahb", "per";
> > > > +				bus-width = <4>;
> > > > +				fsl,tuning-step = <2>;
> > > > +				fsl,tuning-start-tap = <20>;
> > > > +				status = "disabled";
> > > > +			};
> > > > +
> > > > +			usdhc3: mmc at 2198000 {
> > > > +				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-
> > > > usdhc";
> > > > +				reg = <0x02198000 0x4000>;
> > > > +				interrupts = <GIC_SPI 24
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_USDHC3>,
> > > > +					 <&clks IMX6SLL_CLK_USDHC3>,
> > > > +					 <&clks IMX6SLL_CLK_USDHC3>;
> > > > +				clock-names = "ipg", "ahb", "per";
> > > > +				bus-width = <4>;
> > > > +				fsl,tuning-step = <2>;
> > > > +				fsl,tuning-start-tap = <20>;
> > > > +				status = "disabled";
> > > > +			};
> > > > +
> > > > +			i2c1: i2c at 21a0000 {
> > > > +				#address-cells = <1>;
> > > > +				#size-cells = <0>;
> > > > +				compatible = "fs,imx6sll-i2c", "fsl,imx21-i2c";
> > > > +				reg = <0x021a0000 0x4000>;
> > > > +				interrupts = <GIC_SPI 36
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_I2C1>;
> > > > +				status = "disabled";
> > > > +			};
> > > > +
> > > > +			i2c2: i2c at 21a4000 {
> > > > +				#address-cells = <1>;
> > > > +				#size-cells = <0>;
> > > > +				compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
> > > > +				reg = <0x021a4000 0x4000>;
> > > > +				interrupts = <GIC_SPI 37
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_I2C2>;
> > > > +				status = "disabled";
> > > > +			};
> > > > +
> > > > +			i2c3: i2c at 21a8000 {
> > > > +				#address-cells = <1>;
> > > > +				#size-cells = <0>;
> > > > +				compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
> > > > +				reg = <0x021a8000 0x4000>;
> > > > +				interrupts = <GIC_SPI 38
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				clocks = <&clks IMX6SLL_CLK_I2C3>;
> > > > +				status = "disabled";
> > > > +			};
> > > > +
> > > > +			mmdc: memory-controller at 21b0000 {
> > > > +				compatible = "fsl,imx6sll-mmdc", "fsl,imx6q-
> > > > mmdc";
> > > > +				reg = <0x021b0000 0x4000>;
> > > > +			};
> > > > +
> > > > +			ocotp: ocotp-ctrl at 21bc000 {
> > > > +				compatible = "fsl,imx6sll-ocotp", "syscon";
> > > > +				reg = <0x021bc000 0x4000>;
> > > > +				clocks = <&clks IMX6SLL_CLK_OCOTP>;
> > > > +			};
> > > > +
> > > > +			audmux: audmux at 21d8000 {
> > > > +				compatible = "fsl,imx6sll-audmux",
> > > > "fsl,imx31-audmux";
> > > > +				reg = <0x021d8000 0x4000>;
> > > > +				status = "disabled";
> > > > +			};
> > > > +
> > > > +			uart5: serial at 21f4000 {
> > > > +				compatible = "fsl,imx6sll-uart", "fsl,imx6q-
> > > > uart",
> > > > +					     "fsl,imx21-uart";
> > > > +				reg = <0x021f4000 0x4000>;
> > > > +				interrupts =<GIC_SPI 30
> > > > IRQ_TYPE_LEVEL_HIGH>;
> > > > +				dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
> > > > +				dma-names = "rx", "tx";
> > > > +				clocks = <&clks IMX6SLL_CLK_UART5_IPG>,
> > > > +					 <&clks
> > > > IMX6SLL_CLK_UART5_SERIAL>;
> > > > +				clock-names = "ipg", "per";
> > > > +				status = "disabled";
> > > > +			};
> > > > +		};
> > > > +	};
> > > > +};
> > > > --
> > > > 1.9.1