From: cpandya@codeaurora.org (Chintan Pandya)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v11 2/4] arm64: tlbflush: Introduce __flush_tlb_kernel_pgtable
Date: Fri, 25 May 2018 19:58:07 +0530 [thread overview]
Message-ID: <1527258489-30473-3-git-send-email-cpandya@codeaurora.org> (raw)
In-Reply-To: <1527258489-30473-1-git-send-email-cpandya@codeaurora.org>
Add an interface to invalidate intermediate page tables
from TLB for kernel.
Signed-off-by: Chintan Pandya <cpandya@codeaurora.org>
---
arch/arm64/include/asm/tlbflush.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index dfc61d7..a4a1901 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -218,6 +218,13 @@ static inline void __flush_tlb_pgtable(struct mm_struct *mm,
dsb(ish);
}
+static inline void __flush_tlb_kernel_pgtable(unsigned long kaddr)
+{
+ unsigned long addr = __TLBI_VADDR(kaddr, 0);
+
+ __tlbi(vaae1is, addr);
+ dsb(ish);
+}
#endif
#endif
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation
Center, Inc., is a member of Code Aurora Forum, a Linux Foundation
Collaborative Project
next prev parent reply other threads:[~2018-05-25 14:28 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-25 14:28 [PATCH v11 0/4] Fix issues with huge mapping in ioremap for ARM64 Chintan Pandya
2018-05-25 14:28 ` [PATCH v11 1/4] ioremap: Update pgtable free interfaces with addr Chintan Pandya
2018-05-25 14:28 ` Chintan Pandya [this message]
2018-05-25 14:28 ` [PATCH v11 3/4] arm64: Implement page table free interfaces Chintan Pandya
2018-05-25 14:28 ` [PATCH v11 4/4] Revert "arm64: Enforce BBM for huge IO/VMAP mappings" Chintan Pandya
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