From: suzuki.poulose@arm.com (Suzuki K Poulose)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 03/12] coresight: tmc-etr: Do not clean trace buffer
Date: Tue, 29 May 2018 14:15:28 +0100 [thread overview]
Message-ID: <1527599737-28408-4-git-send-email-suzuki.poulose@arm.com> (raw)
In-Reply-To: <1527599737-28408-1-git-send-email-suzuki.poulose@arm.com>
We zero out the entire trace buffer used for ETR before it is enabled,
for helping with debugging. With the addition of scatter-gather mode,
the buffer could be bigger and non-contiguous.
Get rid of this step; if someone wants to debug, they can always add it
as and when needed.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
drivers/hwtracing/coresight/coresight-tmc-etr.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index f88342d..1de05c9 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -13,9 +13,6 @@ static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
{
u32 axictl, sts;
- /* Zero out the memory to help with debug */
- memset(drvdata->vaddr, 0, drvdata->size);
-
CS_UNLOCK(drvdata->base);
/* Wait for TMCSReady bit to be set */
@@ -340,9 +337,8 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata)
if (drvdata->mode == CS_MODE_SYSFS) {
/*
* The trace run will continue with the same allocated trace
- * buffer. The trace buffer is cleared in tmc_etr_enable_hw(),
- * so we don't have to explicitly clear it. Also, since the
- * tracer is still enabled drvdata::buf can't be NULL.
+ * buffer. Since the tracer is still enabled drvdata::buf can't
+ * be NULL.
*/
tmc_etr_enable_hw(drvdata);
} else {
--
2.7.4
next prev parent reply other threads:[~2018-05-29 13:15 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-29 13:15 [PATCH v2 00/12] coresight: tmc-etr Transparent buffer management Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 01/12] coresight: ETM: Add support for Arm Cortex-A73 and Cortex-A35 Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 02/12] coresight: tmc: Hide trace buffer handling for file read Suzuki K Poulose
2018-05-29 13:15 ` Suzuki K Poulose [this message]
2018-05-29 13:15 ` [PATCH v2 04/12] coresight: tmc-etr: Disallow perf mode Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 05/12] coresight: Add helper for inserting synchronization packets Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 06/12] dts: bindings: Restrict coresight tmc-etr scatter-gather mode Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 07/12] dts: juno: Add scatter-gather support for all revisions Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 08/12] coresight: Add generic TMC sg table framework Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 09/12] coresight: Add support for TMC ETR SG unit Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 10/12] coresight: tmc-etr: Add transparent buffer management Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 11/12] coresight: tmc-etr buf: Add TMC scatter gather mode backend Suzuki K Poulose
2018-05-29 13:15 ` [PATCH v2 12/12] coresight: tmc: Add configuration support for trace buffer size Suzuki K Poulose
2018-05-31 3:55 ` Rob Herring
2018-05-31 15:36 ` [PATCH v2 00/12] coresight: tmc-etr Transparent buffer management Mathieu Poirier
2018-05-31 16:17 ` Suzuki K Poulose
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