linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
* [PATCH] soc: imx: gpc: fix PDN delay & improve readability
@ 2018-06-18  9:01 Sven Schmitt
  2018-06-18  9:27 ` Lucas Stach
  0 siblings, 1 reply; 6+ messages in thread
From: Sven Schmitt @ 2018-06-18  9:01 UTC (permalink / raw)
  To: linux-arm-kernel

- imx6_pm_domain_power_off(): reads iso and iso2sw
  from GPC_PGC_PUPSCR_OFFS which stores the power up delays
  => use GPC_PGC_PDNSCR_OFFS for the correct delays

- remove unused #defines

- struct imx_pm_domain: introduce cntr_pup_bit
  to replace usage of cntr_pdn_bit+1 in imx6_pm_domain_power_on()

- GPC_PGC_DOMAIN_*: made consistent use of index defines

Signed-off-by: Sven Schmitt <sven.schmitt@mixed-mode.de>
---
 drivers/soc/imx/gpc.c | 41 ++++++++++++++++++++---------------------
 1 file changed, 20 insertions(+), 21 deletions(-)

diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c
index c4d35f32af8d..b92377c75ddf 100644
--- a/drivers/soc/imx/gpc.c
+++ b/drivers/soc/imx/gpc.c
@@ -24,15 +24,6 @@
 #define GPC_PGC_CTRL_OFFS	0x0
 #define GPC_PGC_PUPSCR_OFFS	0x4
 #define GPC_PGC_PDNSCR_OFFS	0x8
-#define GPC_PGC_SW2ISO_SHIFT	0x8
-#define GPC_PGC_SW_SHIFT	0x0
-
-#define GPC_PGC_GPU_PDN		0x260
-#define GPC_PGC_GPU_PUPSCR	0x264
-#define GPC_PGC_GPU_PDNSCR	0x268
-
-#define GPU_VPU_PUP_REQ		BIT(1)
-#define GPU_VPU_PDN_REQ		BIT(0)
 
 #define GPC_CLK_MAX		6
 
@@ -46,6 +37,7 @@ struct imx_pm_domain {
 	int num_clks;
 	unsigned int reg_offs;
 	signed char cntr_pdn_bit;
+	signed char cntr_pup_bit;
 	unsigned int ipg_rate_mhz;
 	unsigned int flags;
 };
@@ -66,7 +58,7 @@ static int imx6_pm_domain_power_off(struct generic_pm_domain *genpd)
 		return -EBUSY;
 
 	/* Read ISO and ISO2SW power down delays */
-	regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val);
+	regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PDNSCR_OFFS, &val);
 	iso = val & 0x3f;
 	iso2sw = (val >> 8) & 0x3f;
 
@@ -116,7 +108,7 @@ static int imx6_pm_domain_power_on(struct generic_pm_domain *genpd)
 	sw2iso = (val >> 8) & 0x3f;
 
 	/* Request GPC to power up domain */
-	val = BIT(pd->cntr_pdn_bit + 1);
+	val = BIT(pd->cntr_pup_bit);
 	regmap_update_bits(pd->regmap, GPC_CNTR, val, val);
 
 	/* Wait ISO + ISO2SW IPG clock cycles */
@@ -241,22 +233,24 @@ static struct platform_driver imx_pgc_power_domain_driver = {
 };
 builtin_platform_driver(imx_pgc_power_domain_driver)
 
-#define GPC_PGC_DOMAIN_ARM	0
-#define GPC_PGC_DOMAIN_PU	1
-#define GPC_PGC_DOMAIN_DISPLAY	2
-
 static struct genpd_power_state imx6_pm_domain_pu_state = {
 	.power_off_latency_ns = 25000,
 	.power_on_latency_ns = 2000000,
 };
 
+#define GPC_PGC_DOMAIN_ARM 0
+#define GPC_PGC_DOMAIN_PU 1
+#define GPC_PGC_DOMAIN_DISPLAY 2
+#define GPC_PGC_DOMAIN_PCI 3
+
 static struct imx_pm_domain imx_gpc_domains[] = {
-	{
+	[GPC_PGC_DOMAIN_ARM] {
 		.base = {
 			.name = "ARM",
 			.flags = GENPD_FLAG_ALWAYS_ON,
 		},
-	}, {
+	},
+	[GPC_PGC_DOMAIN_PU] {
 		.base = {
 			.name = "PU",
 			.power_off = imx6_pm_domain_power_off,
@@ -266,7 +260,9 @@ static struct imx_pm_domain imx_gpc_domains[] = {
 		},
 		.reg_offs = 0x260,
 		.cntr_pdn_bit = 0,
-	}, {
+		.cntr_pup_bit = 1,
+	},
+	[GPC_PGC_DOMAIN_DISPLAY] {
 		.base = {
 			.name = "DISPLAY",
 			.power_off = imx6_pm_domain_power_off,
@@ -274,7 +270,9 @@ static struct imx_pm_domain imx_gpc_domains[] = {
 		},
 		.reg_offs = 0x240,
 		.cntr_pdn_bit = 4,
-	}, {
+		.cntr_pup_bit = 5,
+	},
+	[GPC_PGC_DOMAIN_PCI] {
 		.base = {
 			.name = "PCI",
 			.power_off = imx6_pm_domain_power_off,
@@ -282,6 +280,7 @@ static struct imx_pm_domain imx_gpc_domains[] = {
 		},
 		.reg_offs = 0x200,
 		.cntr_pdn_bit = 6,
+		.cntr_pup_bit = 7,
 	},
 };
 
@@ -326,8 +325,8 @@ static const struct regmap_config imx_gpc_regmap_config = {
 };
 
 static struct generic_pm_domain *imx_gpc_onecell_domains[] = {
-	&imx_gpc_domains[0].base,
-	&imx_gpc_domains[1].base,
+	&imx_gpc_domains[GPC_PGC_DOMAIN_ARM].base,
+	&imx_gpc_domains[GPC_PGC_DOMAIN_PU].base,
 };
 
 static struct genpd_onecell_data imx_gpc_onecell_data = {
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH] soc: imx: gpc: fix PDN delay & improve readability
  2018-06-18  9:01 [PATCH] soc: imx: gpc: fix PDN delay & improve readability Sven Schmitt
@ 2018-06-18  9:27 ` Lucas Stach
  2018-06-18 10:11   ` [PATCH v2] " Sven Schmitt
  0 siblings, 1 reply; 6+ messages in thread
From: Lucas Stach @ 2018-06-18  9:27 UTC (permalink / raw)
  To: linux-arm-kernel

Am Montag, den 18.06.2018, 09:01 +0000 schrieb Sven Schmitt:
> - imx6_pm_domain_power_off(): reads iso and iso2sw
> ? from GPC_PGC_PUPSCR_OFFS which stores the power up delays
> ? => use GPC_PGC_PDNSCR_OFFS for the correct delays
> 
> - remove unused #defines
> 
> - struct imx_pm_domain: introduce cntr_pup_bit
> ? to replace usage of cntr_pdn_bit+1 in imx6_pm_domain_power_on()

I'm not sure I see the value in that one.
Otherwise this change looks fine.

Regards,
Lucas

> 
> - GPC_PGC_DOMAIN_*: made consistent use of index defines
> 
> Signed-off-by: Sven Schmitt <sven.schmitt@mixed-mode.de>
> ---
> ?drivers/soc/imx/gpc.c | 41 ++++++++++++++++++++---------------------
> ?1 file changed, 20 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c
> index c4d35f32af8d..b92377c75ddf 100644
> --- a/drivers/soc/imx/gpc.c
> +++ b/drivers/soc/imx/gpc.c
> @@ -24,15 +24,6 @@
> ?#define GPC_PGC_CTRL_OFFS	0x0
> ?#define GPC_PGC_PUPSCR_OFFS	0x4
> ?#define GPC_PGC_PDNSCR_OFFS	0x8
> -#define GPC_PGC_SW2ISO_SHIFT	0x8
> -#define GPC_PGC_SW_SHIFT	0x0
> -
> -#define GPC_PGC_GPU_PDN		0x260
> -#define GPC_PGC_GPU_PUPSCR	0x264
> -#define GPC_PGC_GPU_PDNSCR	0x268
> -
> -#define GPU_VPU_PUP_REQ		BIT(1)
> -#define GPU_VPU_PDN_REQ		BIT(0)
> ?
> ?#define GPC_CLK_MAX		6
> ?
> @@ -46,6 +37,7 @@ struct imx_pm_domain {
> ?	int num_clks;
> ?	unsigned int reg_offs;
> ?	signed char cntr_pdn_bit;
> +	signed char cntr_pup_bit;
> ?	unsigned int ipg_rate_mhz;
> ?	unsigned int flags;
> ?};
> @@ -66,7 +58,7 @@ static int imx6_pm_domain_power_off(struct
> generic_pm_domain *genpd)
> ?		return -EBUSY;
> ?
> ?	/* Read ISO and ISO2SW power down delays */
> -	regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS,
> &val);
> +	regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PDNSCR_OFFS,
> &val);
> ?	iso = val & 0x3f;
> ?	iso2sw = (val >> 8) & 0x3f;
> ?
> @@ -116,7 +108,7 @@ static int imx6_pm_domain_power_on(struct
> generic_pm_domain *genpd)
> ?	sw2iso = (val >> 8) & 0x3f;
> ?
> ?	/* Request GPC to power up domain */
> -	val = BIT(pd->cntr_pdn_bit + 1);
> +	val = BIT(pd->cntr_pup_bit);
> ?	regmap_update_bits(pd->regmap, GPC_CNTR, val, val);
> ?
> ?	/* Wait ISO + ISO2SW IPG clock cycles */
> @@ -241,22 +233,24 @@ static struct platform_driver
> imx_pgc_power_domain_driver = {
> ?};
> ?builtin_platform_driver(imx_pgc_power_domain_driver)
> ?
> -#define GPC_PGC_DOMAIN_ARM	0
> -#define GPC_PGC_DOMAIN_PU	1
> -#define GPC_PGC_DOMAIN_DISPLAY	2
> -
> ?static struct genpd_power_state imx6_pm_domain_pu_state = {
> ?	.power_off_latency_ns = 25000,
> ?	.power_on_latency_ns = 2000000,
> ?};
> ?
> +#define GPC_PGC_DOMAIN_ARM 0
> +#define GPC_PGC_DOMAIN_PU 1
> +#define GPC_PGC_DOMAIN_DISPLAY 2
> +#define GPC_PGC_DOMAIN_PCI 3
> +
> ?static struct imx_pm_domain imx_gpc_domains[] = {
> -	{
> +	[GPC_PGC_DOMAIN_ARM] {
> ?		.base = {
> ?			.name = "ARM",
> ?			.flags = GENPD_FLAG_ALWAYS_ON,
> ?		},
> -	}, {
> +	},
> +	[GPC_PGC_DOMAIN_PU] {
> ?		.base = {
> ?			.name = "PU",
> ?			.power_off = imx6_pm_domain_power_off,
> @@ -266,7 +260,9 @@ static struct imx_pm_domain imx_gpc_domains[] = {
> ?		},
> ?		.reg_offs = 0x260,
> ?		.cntr_pdn_bit = 0,
> -	}, {
> +		.cntr_pup_bit = 1,
> +	},
> +	[GPC_PGC_DOMAIN_DISPLAY] {
> ?		.base = {
> ?			.name = "DISPLAY",
> ?			.power_off = imx6_pm_domain_power_off,
> @@ -274,7 +270,9 @@ static struct imx_pm_domain imx_gpc_domains[] = {
> ?		},
> ?		.reg_offs = 0x240,
> ?		.cntr_pdn_bit = 4,
> -	}, {
> +		.cntr_pup_bit = 5,
> +	},
> +	[GPC_PGC_DOMAIN_PCI] {
> ?		.base = {
> ?			.name = "PCI",
> ?			.power_off = imx6_pm_domain_power_off,
> @@ -282,6 +280,7 @@ static struct imx_pm_domain imx_gpc_domains[] = {
> ?		},
> ?		.reg_offs = 0x200,
> ?		.cntr_pdn_bit = 6,
> +		.cntr_pup_bit = 7,
> ?	},
> ?};
> ?
> @@ -326,8 +325,8 @@ static const struct regmap_config
> imx_gpc_regmap_config = {
> ?};
> ?
> ?static struct generic_pm_domain *imx_gpc_onecell_domains[] = {
> -	&imx_gpc_domains[0].base,
> -	&imx_gpc_domains[1].base,
> +	&imx_gpc_domains[GPC_PGC_DOMAIN_ARM].base,
> +	&imx_gpc_domains[GPC_PGC_DOMAIN_PU].base,
> ?};
> ?
> ?static struct genpd_onecell_data imx_gpc_onecell_data = {

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v2] soc: imx: gpc: fix PDN delay & improve readability
  2018-06-18  9:27 ` Lucas Stach
@ 2018-06-18 10:11   ` Sven Schmitt
  2018-06-18 10:13     ` Lucas Stach
  2018-07-23 14:39     ` Fabio Estevam
  0 siblings, 2 replies; 6+ messages in thread
From: Sven Schmitt @ 2018-06-18 10:11 UTC (permalink / raw)
  To: linux-arm-kernel

- imx6_pm_domain_power_off(): reads iso and iso2sw
  from GPC_PGC_PUPSCR_OFFS which stores the power up delays
  => use GPC_PGC_PDNSCR_OFFS for the correct delays

- remove unused #defines

- GPC_PGC_DOMAIN_*: made consistent use of index defines

Signed-off-by: Sven Schmitt <sven.schmitt@mixed-mode.de>
---
Changes in v2:
* dropped cntr_pup_bit

 drivers/soc/imx/gpc.c | 35 +++++++++++++++--------------------
 1 file changed, 15 insertions(+), 20 deletions(-)

diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c
index c4d35f32af8d..aa13180cfcfc 100644
--- a/drivers/soc/imx/gpc.c
+++ b/drivers/soc/imx/gpc.c
@@ -24,15 +24,6 @@
 #define GPC_PGC_CTRL_OFFS	0x0
 #define GPC_PGC_PUPSCR_OFFS	0x4
 #define GPC_PGC_PDNSCR_OFFS	0x8
-#define GPC_PGC_SW2ISO_SHIFT	0x8
-#define GPC_PGC_SW_SHIFT	0x0
-
-#define GPC_PGC_GPU_PDN		0x260
-#define GPC_PGC_GPU_PUPSCR	0x264
-#define GPC_PGC_GPU_PDNSCR	0x268
-
-#define GPU_VPU_PUP_REQ		BIT(1)
-#define GPU_VPU_PDN_REQ		BIT(0)
 
 #define GPC_CLK_MAX		6
 
@@ -66,7 +57,7 @@ static int imx6_pm_domain_power_off(struct generic_pm_domain *genpd)
 		return -EBUSY;
 
 	/* Read ISO and ISO2SW power down delays */
-	regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val);
+	regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PDNSCR_OFFS, &val);
 	iso = val & 0x3f;
 	iso2sw = (val >> 8) & 0x3f;
 
@@ -241,22 +232,24 @@ static struct platform_driver imx_pgc_power_domain_driver = {
 };
 builtin_platform_driver(imx_pgc_power_domain_driver)
 
-#define GPC_PGC_DOMAIN_ARM	0
-#define GPC_PGC_DOMAIN_PU	1
-#define GPC_PGC_DOMAIN_DISPLAY	2
-
 static struct genpd_power_state imx6_pm_domain_pu_state = {
 	.power_off_latency_ns = 25000,
 	.power_on_latency_ns = 2000000,
 };
 
+#define GPC_PGC_DOMAIN_ARM 0
+#define GPC_PGC_DOMAIN_PU 1
+#define GPC_PGC_DOMAIN_DISPLAY 2
+#define GPC_PGC_DOMAIN_PCI 3
+
 static struct imx_pm_domain imx_gpc_domains[] = {
-	{
+	[GPC_PGC_DOMAIN_ARM] {
 		.base = {
 			.name = "ARM",
 			.flags = GENPD_FLAG_ALWAYS_ON,
 		},
-	}, {
+	},
+	[GPC_PGC_DOMAIN_PU] {
 		.base = {
 			.name = "PU",
 			.power_off = imx6_pm_domain_power_off,
@@ -266,7 +259,8 @@ static struct imx_pm_domain imx_gpc_domains[] = {
 		},
 		.reg_offs = 0x260,
 		.cntr_pdn_bit = 0,
-	}, {
+	},
+	[GPC_PGC_DOMAIN_DISPLAY] {
 		.base = {
 			.name = "DISPLAY",
 			.power_off = imx6_pm_domain_power_off,
@@ -274,7 +268,8 @@ static struct imx_pm_domain imx_gpc_domains[] = {
 		},
 		.reg_offs = 0x240,
 		.cntr_pdn_bit = 4,
-	}, {
+	},
+	[GPC_PGC_DOMAIN_PCI] {
 		.base = {
 			.name = "PCI",
 			.power_off = imx6_pm_domain_power_off,
@@ -326,8 +321,8 @@ static const struct regmap_config imx_gpc_regmap_config = {
 };
 
 static struct generic_pm_domain *imx_gpc_onecell_domains[] = {
-	&imx_gpc_domains[0].base,
-	&imx_gpc_domains[1].base,
+	&imx_gpc_domains[GPC_PGC_DOMAIN_ARM].base,
+	&imx_gpc_domains[GPC_PGC_DOMAIN_PU].base,
 };
 
 static struct genpd_onecell_data imx_gpc_onecell_data = {
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v2] soc: imx: gpc: fix PDN delay & improve readability
  2018-06-18 10:11   ` [PATCH v2] " Sven Schmitt
@ 2018-06-18 10:13     ` Lucas Stach
  2018-07-23 14:39     ` Fabio Estevam
  1 sibling, 0 replies; 6+ messages in thread
From: Lucas Stach @ 2018-06-18 10:13 UTC (permalink / raw)
  To: linux-arm-kernel

Am Montag, den 18.06.2018, 10:11 +0000 schrieb Sven Schmitt:
> - imx6_pm_domain_power_off(): reads iso and iso2sw
> ? from GPC_PGC_PUPSCR_OFFS which stores the power up delays
> ? => use GPC_PGC_PDNSCR_OFFS for the correct delays
> 
> - remove unused #defines
> 
> - GPC_PGC_DOMAIN_*: made consistent use of index defines
> 
> Signed-off-by: Sven Schmitt <sven.schmitt@mixed-mode.de>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
> Changes in v2:
> * dropped cntr_pup_bit
> 
> ?drivers/soc/imx/gpc.c | 35 +++++++++++++++--------------------
> ?1 file changed, 15 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c
> index c4d35f32af8d..aa13180cfcfc 100644
> --- a/drivers/soc/imx/gpc.c
> +++ b/drivers/soc/imx/gpc.c
> @@ -24,15 +24,6 @@
> > ?#define GPC_PGC_CTRL_OFFS	0x0
> > ?#define GPC_PGC_PUPSCR_OFFS	0x4
> > ?#define GPC_PGC_PDNSCR_OFFS	0x8
> > -#define GPC_PGC_SW2ISO_SHIFT	0x8
> > -#define GPC_PGC_SW_SHIFT	0x0
> -
> > -#define GPC_PGC_GPU_PDN		0x260
> > -#define GPC_PGC_GPU_PUPSCR	0x264
> > -#define GPC_PGC_GPU_PDNSCR	0x268
> -
> > -#define GPU_VPU_PUP_REQ		BIT(1)
> > -#define GPU_VPU_PDN_REQ		BIT(0)
> ?
> > ?#define GPC_CLK_MAX		6
> ?
> @@ -66,7 +57,7 @@ static int imx6_pm_domain_power_off(struct generic_pm_domain *genpd)
> > ?		return -EBUSY;
> ?
> > ?	/* Read ISO and ISO2SW power down delays */
> > -	regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val);
> > +	regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PDNSCR_OFFS, &val);
> > ?	iso = val & 0x3f;
> > ?	iso2sw = (val >> 8) & 0x3f;
> ?
> @@ -241,22 +232,24 @@ static struct platform_driver imx_pgc_power_domain_driver = {
> ?};
> ?builtin_platform_driver(imx_pgc_power_domain_driver)
> ?
> > -#define GPC_PGC_DOMAIN_ARM	0
> > -#define GPC_PGC_DOMAIN_PU	1
> > -#define GPC_PGC_DOMAIN_DISPLAY	2
> -
> ?static struct genpd_power_state imx6_pm_domain_pu_state = {
> > ?	.power_off_latency_ns = 25000,
> > ?	.power_on_latency_ns = 2000000,
> ?};
> ?
> +#define GPC_PGC_DOMAIN_ARM 0
> +#define GPC_PGC_DOMAIN_PU 1
> +#define GPC_PGC_DOMAIN_DISPLAY 2
> +#define GPC_PGC_DOMAIN_PCI 3
> +
> ?static struct imx_pm_domain imx_gpc_domains[] = {
> > -	{
> > +	[GPC_PGC_DOMAIN_ARM] {
> > ?		.base = {
> > ?			.name = "ARM",
> > ?			.flags = GENPD_FLAG_ALWAYS_ON,
> > ?		},
> > -	}, {
> > +	},
> > +	[GPC_PGC_DOMAIN_PU] {
> > ?		.base = {
> > ?			.name = "PU",
> > ?			.power_off = imx6_pm_domain_power_off,
> @@ -266,7 +259,8 @@ static struct imx_pm_domain imx_gpc_domains[] = {
> > ?		},
> > ?		.reg_offs = 0x260,
> > ?		.cntr_pdn_bit = 0,
> > -	}, {
> > +	},
> > +	[GPC_PGC_DOMAIN_DISPLAY] {
> > ?		.base = {
> > ?			.name = "DISPLAY",
> > ?			.power_off = imx6_pm_domain_power_off,
> @@ -274,7 +268,8 @@ static struct imx_pm_domain imx_gpc_domains[] = {
> > ?		},
> > ?		.reg_offs = 0x240,
> > ?		.cntr_pdn_bit = 4,
> > -	}, {
> > +	},
> > +	[GPC_PGC_DOMAIN_PCI] {
> > ?		.base = {
> > ?			.name = "PCI",
> > ?			.power_off = imx6_pm_domain_power_off,
> @@ -326,8 +321,8 @@ static const struct regmap_config imx_gpc_regmap_config = {
> ?};
> ?
> ?static struct generic_pm_domain *imx_gpc_onecell_domains[] = {
> > -	&imx_gpc_domains[0].base,
> > -	&imx_gpc_domains[1].base,
> > +	&imx_gpc_domains[GPC_PGC_DOMAIN_ARM].base,
> > +	&imx_gpc_domains[GPC_PGC_DOMAIN_PU].base,
> ?};
> ?
> ?static struct genpd_onecell_data imx_gpc_onecell_data = {

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v2] soc: imx: gpc: fix PDN delay & improve readability
  2018-06-18 10:11   ` [PATCH v2] " Sven Schmitt
  2018-06-18 10:13     ` Lucas Stach
@ 2018-07-23 14:39     ` Fabio Estevam
  2018-07-24  7:01       ` AW: " Sven Schmitt
  1 sibling, 1 reply; 6+ messages in thread
From: Fabio Estevam @ 2018-07-23 14:39 UTC (permalink / raw)
  To: linux-arm-kernel

Hi Sven,

On Mon, Jun 18, 2018 at 7:11 AM, Sven Schmitt
<Sven.Schmitt@mixed-mode.de> wrote:
> - imx6_pm_domain_power_off(): reads iso and iso2sw
>   from GPC_PGC_PUPSCR_OFFS which stores the power up delays
>   => use GPC_PGC_PDNSCR_OFFS for the correct delays
>
> - remove unused #defines
>
> - GPC_PGC_DOMAIN_*: made consistent use of index defines
>
> Signed-off-by: Sven Schmitt <sven.schmitt@mixed-mode.de>

It seems you missed to send it to Shawn Guo, who is the imx maintainer.

Please run ./scripts/get_maintainer.pl 0001-your.patch and resend it
to these folks.

Thanks

^ permalink raw reply	[flat|nested] 6+ messages in thread

* AW: [PATCH v2] soc: imx: gpc: fix PDN delay & improve readability
  2018-07-23 14:39     ` Fabio Estevam
@ 2018-07-24  7:01       ` Sven Schmitt
  0 siblings, 0 replies; 6+ messages in thread
From: Sven Schmitt @ 2018-07-24  7:01 UTC (permalink / raw)
  To: linux-arm-kernel

Hi Fabio,

> Hi Sven,
>
> On Mon, Jun 18, 2018 at 7:11 AM, Sven Schmitt
><Sven.Schmitt@mixed-mode.de> wrote:
>> - imx6_pm_domain_power_off(): reads iso and iso2sw
>>   from GPC_PGC_PUPSCR_OFFS which stores the power up delays
>>   => use GPC_PGC_PDNSCR_OFFS for the correct delays
>>
>> - remove unused #defines
>>
>> - GPC_PGC_DOMAIN_*: made consistent use of index defines
>>
>> Signed-off-by: Sven Schmitt <sven.schmitt@mixed-mode.de>
>
> It seems you missed to send it to Shawn Guo, who is the imx maintainer.
>
> Please run ./scripts/get_maintainer.pl 0001-your.patch and resend it
> to these folks.

Thanks for the hint. I will resend the patch.

Best regards
Sven

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2018-07-24  7:01 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-06-18  9:01 [PATCH] soc: imx: gpc: fix PDN delay & improve readability Sven Schmitt
2018-06-18  9:27 ` Lucas Stach
2018-06-18 10:11   ` [PATCH v2] " Sven Schmitt
2018-06-18 10:13     ` Lucas Stach
2018-07-23 14:39     ` Fabio Estevam
2018-07-24  7:01       ` AW: " Sven Schmitt

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).