linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: sunil.kovvuri@gmail.com (sunil.kovvuri at gmail.com)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 00/15] soc: octeontx2: Add RVU admin function driver
Date: Tue, 28 Aug 2018 16:27:03 +0530	[thread overview]
Message-ID: <1535453838-12154-1-git-send-email-sunil.kovvuri@gmail.com> (raw)

From: Sunil Goutham <sgoutham@marvell.com>

Resource virtualization unit (RVU) on Marvell's OcteonTX2 SOC supports
multiple PCIe SRIOV physical functions (PFs) and virtual functions (VFs).
PF0 is called administrative / admin function (AF) and has privilege access
to registers to provision different RVU functional blocks to each of
PF/VF. 

This admin function (AF) driver acts as a configuration / administrative
software which provisions functional blocks to a PF/VF on demand for them
to work as one of the following
 - A basic network controller (i.e NIC).
 - NIC with packet filtering, shaping and scheduling capabilities.
 - A crypto device.
 - A combination of above etc.

PF/VFs communicate with admin function via a shared memory region.
This patch series adds logic for the following
 - RVU AF driver with functional blocks provisioning support
 - Mailbox infrastructure for communication between AF and PFs.
 - CGX driver which provides information about physcial network
   interfaces which AF processes and forwards required info to
   PF/VF drivers.

This is the first set of patches out of 70 odd patches.

Note: This driver neither receives any data nor processes it i.e no I/O,
      just does the hardware configuration.

Aleksey Makarov (2):
  soc: octeontx2: Add mailbox support infra
  soc: octeontx2: Convert mbox msg id check to a macro

Geetha sowjanya (1):
  soc: octeontx2: Reconfig MSIX base with IOVA

Linu Cherian (3):
  soc: octeontx2: Set RVU PFs to CGX LMACs mapping
  soc: octeontx2: Add support for CGX link management
  soc: octeontx2: Register for CGX lmac events

Sunil Goutham (9):
  soc: octeontx2: Add Marvell OcteonTX2 RVU AF driver
  soc: octeontx2: Reset all RVU blocks
  soc: octeontx2: Gather RVU blocks HW info
  soc: octeontx2: Add mailbox IRQ and msg handlers
  soc: octeontx2: Scan blocks for LFs provisioned to PF/VF
  soc: octeontx2: Add RVU block LF provisioning support
  soc: octeontx2: Configure block LF's MSIX vector offset
  soc: octeontx2: Add Marvell OcteonTX2 CGX driver
  MAINTAINERS: Add entry for Marvell OcteonTX2 Admin Function driver

 MAINTAINERS                                |   10 +
 drivers/soc/Kconfig                        |    1 +
 drivers/soc/Makefile                       |    1 +
 drivers/soc/marvell/Kconfig                |   23 +
 drivers/soc/marvell/Makefile               |    2 +
 drivers/soc/marvell/octeontx2/Makefile     |   10 +
 drivers/soc/marvell/octeontx2/cgx.c        |  529 +++++++++
 drivers/soc/marvell/octeontx2/cgx.h        |   63 ++
 drivers/soc/marvell/octeontx2/cgx_fw_if.h  |  225 ++++
 drivers/soc/marvell/octeontx2/mbox.c       |  300 +++++
 drivers/soc/marvell/octeontx2/mbox.h       |  211 ++++
 drivers/soc/marvell/octeontx2/rvu.c        | 1625 ++++++++++++++++++++++++++++
 drivers/soc/marvell/octeontx2/rvu.h        |  158 +++
 drivers/soc/marvell/octeontx2/rvu_cgx.c    |  194 ++++
 drivers/soc/marvell/octeontx2/rvu_reg.h    |  442 ++++++++
 drivers/soc/marvell/octeontx2/rvu_struct.h |   78 ++
 16 files changed, 3872 insertions(+)
 create mode 100644 drivers/soc/marvell/Kconfig
 create mode 100644 drivers/soc/marvell/Makefile
 create mode 100644 drivers/soc/marvell/octeontx2/Makefile
 create mode 100644 drivers/soc/marvell/octeontx2/cgx.c
 create mode 100644 drivers/soc/marvell/octeontx2/cgx.h
 create mode 100644 drivers/soc/marvell/octeontx2/cgx_fw_if.h
 create mode 100644 drivers/soc/marvell/octeontx2/mbox.c
 create mode 100644 drivers/soc/marvell/octeontx2/mbox.h
 create mode 100644 drivers/soc/marvell/octeontx2/rvu.c
 create mode 100644 drivers/soc/marvell/octeontx2/rvu.h
 create mode 100644 drivers/soc/marvell/octeontx2/rvu_cgx.c
 create mode 100644 drivers/soc/marvell/octeontx2/rvu_reg.h
 create mode 100644 drivers/soc/marvell/octeontx2/rvu_struct.h

-- 
2.7.4

             reply	other threads:[~2018-08-28 10:57 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-28 10:57 sunil.kovvuri at gmail.com [this message]
2018-08-28 10:57 ` [PATCH 01/15] soc: octeontx2: Add Marvell OcteonTX2 RVU AF driver sunil.kovvuri at gmail.com
2018-08-28 10:57 ` [PATCH 02/15] soc: octeontx2: Reset all RVU blocks sunil.kovvuri at gmail.com
2018-08-28 10:57 ` [PATCH 03/15] soc: octeontx2: Gather RVU blocks HW info sunil.kovvuri at gmail.com
2018-08-28 10:57 ` [PATCH 04/15] soc: octeontx2: Add mailbox support infra sunil.kovvuri at gmail.com
2018-08-28 12:03   ` Arnd Bergmann
2018-08-28 12:47     ` Sunil Kovvuri
2018-08-28 12:52       ` Arnd Bergmann
2018-08-28 13:23         ` Sunil Kovvuri
2018-08-30 13:56           ` Arnd Bergmann
2018-08-30 18:36             ` Sunil Kovvuri
2018-08-31 14:16               ` Arnd Bergmann
2018-08-31 17:25                 ` Sunil Kovvuri
2018-08-28 10:57 ` [PATCH 05/15] soc: octeontx2: Add mailbox IRQ and msg handlers sunil.kovvuri at gmail.com
2018-08-28 10:57 ` [PATCH 06/15] soc: octeontx2: Convert mbox msg id check to a macro sunil.kovvuri at gmail.com
2018-08-28 10:57 ` [PATCH 07/15] soc: octeontx2: Scan blocks for LFs provisioned to PF/VF sunil.kovvuri at gmail.com
2018-08-28 10:57 ` [PATCH 08/15] soc: octeontx2: Add RVU block LF provisioning support sunil.kovvuri at gmail.com
2018-08-28 10:57 ` [PATCH 09/15] soc: octeontx2: Configure block LF's MSIX vector offset sunil.kovvuri at gmail.com
2018-08-28 10:57 ` [PATCH 10/15] soc: octeontx2: Reconfig MSIX base with IOVA sunil.kovvuri at gmail.com
2018-08-28 12:08   ` Arnd Bergmann
2018-08-28 12:42     ` Sunil Kovvuri
2018-08-28 12:57       ` Arnd Bergmann
2018-08-28 13:17         ` Sunil Kovvuri
2018-08-30 13:53           ` Arnd Bergmann
2018-08-30 18:39             ` Sunil Kovvuri
2018-08-28 10:57 ` [PATCH 11/15] soc: octeontx2: Add Marvell OcteonTX2 CGX driver sunil.kovvuri at gmail.com
2018-08-28 12:10   ` Arnd Bergmann
2018-08-28 12:30     ` Sunil Kovvuri
2018-08-28 12:48       ` Arnd Bergmann
2018-08-28 13:09         ` Sunil Kovvuri
2018-08-30 14:07           ` Arnd Bergmann
2018-08-30 17:55             ` Sunil Kovvuri
2018-08-31 14:20               ` Arnd Bergmann
2018-08-31 16:00                 ` Sunil Kovvuri
2018-08-31 18:29                   ` Arnd Bergmann
2018-08-31 18:35                     ` Sunil Kovvuri
2018-08-28 10:57 ` [PATCH 12/15] soc: octeontx2: Set RVU PFs to CGX LMACs mapping sunil.kovvuri at gmail.com
2018-08-28 10:57 ` [PATCH 13/15] soc: octeontx2: Add support for CGX link management sunil.kovvuri at gmail.com
2018-08-28 10:57 ` [PATCH 14/15] soc: octeontx2: Register for CGX lmac events sunil.kovvuri at gmail.com
2018-08-28 10:57 ` [PATCH 15/15] MAINTAINERS: Add entry for Marvell OcteonTX2 Admin Function driver sunil.kovvuri at gmail.com
2018-08-28 12:23 ` [PATCH 00/15] soc: octeontx2: Add RVU admin function driver Arnd Bergmann
2018-08-28 13:24   ` Sunil Kovvuri
2018-08-30  9:40     ` Sunil Kovvuri
2018-08-30 13:26       ` Andrew Lunn
2018-08-30 18:31         ` Sunil Kovvuri

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1535453838-12154-1-git-send-email-sunil.kovvuri@gmail.com \
    --to=sunil.kovvuri@gmail.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).