From mboxrd@z Thu Jan 1 00:00:00 1970 From: yogeshnarayan.gaur@nxp.com (Yogesh Gaur) Date: Fri, 31 Aug 2018 16:00:02 +0530 Subject: [PATCH 5/7] arm64: dts: lx2160a: add fspi node property In-Reply-To: <1535711404-29528-1-git-send-email-yogeshnarayan.gaur@nxp.com> References: <1535711404-29528-1-git-send-email-yogeshnarayan.gaur@nxp.com> Message-ID: <1535711404-29528-6-git-send-email-yogeshnarayan.gaur@nxp.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Add fspi node property for LX2160A SoC for FlexSPI driver. Property added for the FlexSPI controller and for the connected slave device for the LX2160ARDB target. This is having two SPI-NOR flash device, mt35xu512aba, connected at CS0 and CS1. Signed-off-by: Yogesh Gaur --- arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 21 +++++++++++++++++++++ arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 12 ++++++++++++ 2 files changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts index 70fad20..3646315 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts @@ -32,6 +32,27 @@ status = "okay"; }; +&fspi { + status = "okay"; + flash0: mt35xu512aba at 0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "m25p80"; + m25p,fast-read; + spi-max-frequency = <20000000>; + reg = <0>; + }; + + flash1: mt35xu512aba at 1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "m25p80"; + m25p,fast-read; + spi-max-frequency = <20000000>; + reg = <1>; + }; +}; + &i2c0 { status = "okay"; pca9547 at 77 { diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index e35e494..031eb26 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -568,5 +568,17 @@ timeout-sec = <30>; }; + fspi: flexspi at 20c0000 { + status = "disabled"; + compatible = "nxp,lx2160a-fspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x20c0000 0x0 0x10000>, + <0x0 0x20000000 0x0 0x10000000>; + reg-names = "fspi_base", "fspi_mmap"; + interrupts = <0 25 0x4>; /* Level high type */ + clocks = <&clockgen 4 3>, <&clockgen 4 3>; + clock-names = "fspi_en", "fspi"; + }; }; }; -- 2.7.4