From: aisheng.dong@nxp.com (A.s. Dong)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V5 7/9] clk: imx: scu: add scu clock mux
Date: Thu, 18 Oct 2018 16:54:07 +0000 [thread overview]
Message-ID: <1539881347-20871-8-git-send-email-aisheng.dong@nxp.com> (raw)
In-Reply-To: <1539881347-20871-1-git-send-email-aisheng.dong@nxp.com>
Add scu based clock mux.
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
---
ChangeLog:
v4->v5:
* use union to avoid struct cast for IPC read msg
* remove unnecessary debug messages
* move scu clk files into imx top directory
v3->v4:
* scu headfile path update
v2->v3:
* structure name and api usage update
v1->v2:
* move SCU clock API implementation into driver
---
drivers/clk/imx/Makefile | 3 +-
drivers/clk/imx/clk-mux-scu.c | 123 ++++++++++++++++++++++++++++++++++++++++++
drivers/clk/imx/clk-scu.h | 13 +++++
3 files changed, 138 insertions(+), 1 deletion(-)
create mode 100644 drivers/clk/imx/clk-mux-scu.c
diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
index 4564175..5f1cece 100644
--- a/drivers/clk/imx/Makefile
+++ b/drivers/clk/imx/Makefile
@@ -18,7 +18,8 @@ obj-$(CONFIG_MXC_CLK_SCU) += \
clk-divider-scu.o \
clk-divider-gpr-scu.o \
clk-gate-scu.o \
- clk-gate-gpr-scu.o
+ clk-gate-gpr-scu.o \
+ clk-mux-scu.o
obj-$(CONFIG_SOC_IMX1) += clk-imx1.o
obj-$(CONFIG_SOC_IMX21) += clk-imx21.o
diff --git a/drivers/clk/imx/clk-mux-scu.c b/drivers/clk/imx/clk-mux-scu.c
new file mode 100644
index 0000000..8addff1
--- /dev/null
+++ b/drivers/clk/imx/clk-mux-scu.c
@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017~2018 NXP
+ * Dong Aisheng <aisheng.dong@nxp.com>
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+
+#include "clk-scu.h"
+
+struct clk_mux_scu {
+ struct clk_hw hw;
+ u32 rsrc_id;
+ u8 clk_type;
+};
+
+#define to_clk_mux_scu(_hw) container_of(_hw, struct clk_mux_scu, hw)
+
+/* SCU Clock Protocol definitions */
+struct imx_sc_msg_req_set_clock_parent {
+ struct imx_sc_rpc_msg hdr;
+ u16 resource;
+ u8 clk;
+ u8 parent;
+} __packed;
+
+struct req_get_clock_parent {
+ u16 resource;
+ u8 clk;
+} __packed;
+
+struct resp_get_clock_parent {
+ u8 parent;
+};
+
+struct imx_sc_msg_get_clock_parent {
+ struct imx_sc_rpc_msg hdr;
+ union {
+ struct req_get_clock_parent req;
+ struct resp_get_clock_parent resp;
+ } data;
+} __packed;
+
+static u8 clk_mux_scu_get_parent(struct clk_hw *hw)
+{
+ struct clk_mux_scu *mux = to_clk_mux_scu(hw);
+ struct imx_sc_msg_get_clock_parent msg;
+ struct imx_sc_rpc_msg *hdr = &msg.hdr;
+ int ret;
+
+ hdr->ver = IMX_SC_RPC_VERSION;
+ hdr->svc = IMX_SC_RPC_SVC_PM;
+ hdr->func = IMX_SC_PM_FUNC_GET_CLOCK_PARENT;
+ hdr->size = 2;
+
+ msg.data.req.resource = mux->rsrc_id;
+ msg.data.req.clk = mux->clk_type;
+
+ ret = imx_scu_call_rpc(ccm_ipc_handle, &msg, true);
+ if (ret)
+ return ret;
+
+ return msg.data.resp.parent;
+}
+
+static int clk_mux_scu_set_parent(struct clk_hw *hw, u8 index)
+{
+ struct clk_mux_scu *mux = to_clk_mux_scu(hw);
+ struct imx_sc_msg_req_set_clock_parent msg;
+ struct imx_sc_rpc_msg *hdr = &msg.hdr;
+
+ hdr->ver = IMX_SC_RPC_VERSION;
+ hdr->svc = IMX_SC_RPC_SVC_PM;
+ hdr->func = IMX_SC_PM_FUNC_SET_CLOCK_PARENT;
+ hdr->size = 2;
+
+ msg.resource = mux->rsrc_id;
+ msg.clk = mux->clk_type;
+ msg.parent = index;
+
+ return imx_scu_call_rpc(ccm_ipc_handle, &msg, true);
+}
+
+static const struct clk_ops clk_mux_scu_ops = {
+ .get_parent = clk_mux_scu_get_parent,
+ .set_parent = clk_mux_scu_set_parent,
+};
+
+struct clk_hw *clk_register_mux_scu(const char *name, const char * const *parents,
+ int num_parents, unsigned long flags,
+ u32 rsrc_id, u8 clk_type)
+{
+ struct clk_init_data init;
+ struct clk_mux_scu *mux;
+ struct clk_hw *hw;
+ int ret;
+
+ mux = kzalloc(sizeof(*mux), GFP_KERNEL);
+ if (!mux)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &clk_mux_scu_ops;
+ init.parent_names = parents;
+ init.num_parents = num_parents;
+
+ mux->hw.init = &init;
+ mux->rsrc_id = rsrc_id;
+ mux->clk_type = clk_type;
+
+ hw = &mux->hw;
+ ret = clk_hw_register(NULL, hw);
+ if (ret) {
+ kfree(mux);
+ hw = ERR_PTR(ret);
+ }
+
+ return hw;
+}
diff --git a/drivers/clk/imx/clk-scu.h b/drivers/clk/imx/clk-scu.h
index 673b280..2a5a45e 100644
--- a/drivers/clk/imx/clk-scu.h
+++ b/drivers/clk/imx/clk-scu.h
@@ -68,4 +68,17 @@ static inline struct clk_hw *imx_clk_gate_gpr_scu(const char *name, const char *
return clk_register_gate_gpr_scu(name, parent, rsrc_id, gpr_id, invert_flag);
}
+struct clk_hw *clk_register_mux_scu(const char *name, const char * const *parents,
+ int num_parents, unsigned long flags,
+ u32 rsrc_id, u8 clk_type);
+
+static inline struct clk_hw *imx_clk_mux_scu(const char *name,
+ const char * const *parents, int num_parents,
+ u32 rsrc_id, u8 clk_type)
+{
+ return clk_register_mux_scu(name, parents, num_parents,
+ CLK_SET_RATE_NO_REPARENT, rsrc_id,
+ clk_type);
+}
+
#endif
--
2.7.4
next prev parent reply other threads:[~2018-10-18 16:54 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-18 16:53 [PATCH V5 0/9] clk: imx: add imx8qxp clock support A.s. Dong
2018-10-18 16:53 ` [PATCH V5 1/9] clk: imx: add configuration option for mmio clks A.s. Dong
2018-10-18 16:53 ` [PATCH V5 2/9] clk: imx: scu: add scu clock common part A.s. Dong
2018-10-18 16:53 ` [PATCH V5 3/9] clk: imx: scu: add scu clock divider A.s. Dong
2018-10-18 16:53 ` [PATCH V5 4/9] clk: imx: scu: add scu clock gpr divider A.s. Dong
2018-10-18 16:54 ` [PATCH V5 5/9] clk: imx: scu: add scu clock gate A.s. Dong
2018-10-18 16:54 ` [PATCH V5 6/9] clk: imx: scu: add scu clock gpr gate A.s. Dong
2018-10-18 16:54 ` A.s. Dong [this message]
2018-10-18 16:54 ` [PATCH V5 8/9] clk: imx: scu: add scu clock gpr mux A.s. Dong
2018-10-18 16:54 ` [PATCH V5 9/9] clk: imx: add imx8qxp clk driver A.s. Dong
2018-10-18 17:38 ` Stephen Boyd
2018-10-18 18:13 ` A.s. Dong
2018-10-18 20:46 ` Stephen Boyd
2018-10-19 9:05 ` A.s. Dong
2018-10-25 14:43 ` A.s. Dong
2018-11-10 15:58 ` A.s. Dong
2018-11-14 23:23 ` Stephen Boyd
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1539881347-20871-8-git-send-email-aisheng.dong@nxp.com \
--to=aisheng.dong@nxp.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).