From: CK Hu <ck.hu@mediatek.com>
To: Yongqiang Niu <yongqiang.niu@mediatek.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, David Airlie <airlied@linux.ie>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Rob Herring <robh+dt@kernel.org>,
linux-mediatek@lists.infradead.org,
Philipp Zabel <p.zabel@pengutronix.de>,
Matthias Brugger <matthias.bgg@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 02/18] drm/mediatek: add mutex mod and sof into ddp private data
Date: Wed, 26 Dec 2018 10:56:54 +0800 [thread overview]
Message-ID: <1545793014.14496.21.camel@mtksdaap41> (raw)
In-Reply-To: <1545638931-24938-3-git-send-email-yongqiang.niu@mediatek.com>
Hi, Yongqiang:
On Mon, 2018-12-24 at 16:08 +0800, Yongqiang Niu wrote:
> This patch add mutex mod and sof into ddp private data
Usually, the commit title shows 'WHAT' does this patch do, commit
message shows 'WHY' does this patch do, and commit body shows 'HOW' does
this patch do. This commit message just show WHAT does this patch do but
does not show WHY. Maybe this is trivial for you but not for everyone.
So describe more about why you do this.
In addition, 'add mutex mode' and 'add sof' are two things, so break
these two modification into two patches.
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 117 ++++++++++++++++++++++++++-------
> 1 file changed, 94 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 579ce28..adb37e4 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -41,11 +41,14 @@
> #define DISP_REG_CONFIG_DSI_SEL 0x050
> #define DISP_REG_CONFIG_DPI_SEL 0x064
>
> +#define MT2701_DISP_MUTEX0_MOD0 0x2C
Lower case for hex number.
> +#define MT2701_DISP_MUTEX0_SOF0 0x30
Align 0x2c and 0x30
> +
> #define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
> #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
> #define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n))
> -#define DISP_REG_MUTEX_MOD(n) (0x2c + 0x20 * (n))
> -#define DISP_REG_MUTEX_SOF(n) (0x30 + 0x20 * (n))
> +#define DISP_REG_MUTEX_MOD(data, n) ((data)->mutex_mod_reg + 0x20 * (n))
> +#define DISP_REG_MUTEX_SOF(data, n) ((data)->mutex_sof_reg + 0x20 * (n))
> #define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n))
>
> #define INT_MUTEX BIT(1)
> @@ -147,12 +150,30 @@ struct mtk_disp_mutex {
> bool claimed;
> };
>
> +enum mtk_ddp_mutex_sof_id {
> + DDP_MUTEX_SOF_SINGLE_MODE,
> + DDP_MUTEX_SOF_DSI0,
> + DDP_MUTEX_SOF_DSI1,
> + DDP_MUTEX_SOF_DPI0,
> + DDP_MUTEX_SOF_DPI1,
> + DDP_MUTEX_SOF_DSI2,
> + DDP_MUTEX_SOF_DSI3,
> + DDP_MUTEX_SOF_MAX,
> +};
> +
> +struct mtk_ddp_data {
> + const unsigned int *mutex_mod;
> + const unsigned int *mutex_sof;
> + unsigned int mutex_mod_reg;
> + unsigned int mutex_sof_reg;
> +};
> +
> struct mtk_ddp {
> struct device *dev;
> struct clk *clk;
> void __iomem *regs;
> struct mtk_disp_mutex mutex[10];
> - const unsigned int *mutex_mod;
> + const struct mtk_ddp_data *data;
> };
>
> static const unsigned int mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> @@ -202,6 +223,51 @@ struct mtk_ddp {
> [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1,
> };
>
> +static const unsigned int mt2701_mutex_sof[DDP_MUTEX_SOF_MAX] = {
> + [DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> + [DDP_MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
> + [DDP_MUTEX_SOF_DSI1] = MUTEX_SOF_DSI1,
> + [DDP_MUTEX_SOF_DPI0] = MUTEX_SOF_DPI0,
> +};
> +
> +static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_MAX] = {
> + [DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> + [DDP_MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
> + [DDP_MUTEX_SOF_DSI1] = MUTEX_SOF_DSI1,
> + [DDP_MUTEX_SOF_DPI0] = MUTEX_SOF_DPI0,
> + [DDP_MUTEX_SOF_DPI1] = MUTEX_SOF_DPI1,
> + [DDP_MUTEX_SOF_DSI2] = MUTEX_SOF_DSI2,
> + [DDP_MUTEX_SOF_DSI3] = MUTEX_SOF_DSI3,
> +};
> +
> +static const unsigned int mt8173_mutex_sof[DDP_MUTEX_SOF_MAX] = {
> + [DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> + [DDP_MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
> + [DDP_MUTEX_SOF_DSI1] = MUTEX_SOF_DSI1,
> + [DDP_MUTEX_SOF_DPI0] = MUTEX_SOF_DPI0,
> +};
It looks like that both mt8173_mutex_sof and mt2701_mutex_sof are subset
of mt2712_mutex_sof, so I think you could keep only mt2712_mutex_sof and
mt8173 and mt2701 also use this one.
> +
> +static const struct mtk_ddp_data mt2701_ddp_driver_data = {
> + .mutex_mod = mt2701_mutex_mod,
> + .mutex_sof = mt2701_mutex_sof,
> + .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> + .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
> +};
> +
> +static const struct mtk_ddp_data mt2712_ddp_driver_data = {
> + .mutex_mod = mt2712_mutex_mod,
> + .mutex_sof = mt2712_mutex_sof,
> + .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> + .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
> +};
> +
> +static const struct mtk_ddp_data mt8173_ddp_driver_data = {
> + .mutex_mod = mt8173_mutex_mod,
> + .mutex_sof = mt8173_mutex_sof,
> + .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> + .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
> +};
> +
> static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur,
> enum mtk_ddp_comp_id next,
> unsigned int *addr)
> @@ -446,39 +512,40 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
>
> switch (id) {
> case DDP_COMPONENT_DSI0:
> - reg = MUTEX_SOF_DSI0;
> + reg = DDP_MUTEX_SOF_DSI0;
I would like you to change 'reg' to 'id' because you change the usage of
this variable.
Regards,
CK
> break;
> case DDP_COMPONENT_DSI1:
> - reg = MUTEX_SOF_DSI0;
> + reg = DDP_MUTEX_SOF_DSI0;
> break;
> case DDP_COMPONENT_DSI2:
> - reg = MUTEX_SOF_DSI2;
> + reg = DDP_MUTEX_SOF_DSI2;
> break;
> case DDP_COMPONENT_DSI3:
> - reg = MUTEX_SOF_DSI3;
> + reg = DDP_MUTEX_SOF_DSI3;
> break;
> case DDP_COMPONENT_DPI0:
> - reg = MUTEX_SOF_DPI0;
> + reg = DDP_MUTEX_SOF_DPI0;
> break;
> case DDP_COMPONENT_DPI1:
> - reg = MUTEX_SOF_DPI1;
> + reg = DDP_MUTEX_SOF_DPI1;
> break;
> default:
> - if (ddp->mutex_mod[id] < 32) {
> - offset = DISP_REG_MUTEX_MOD(mutex->id);
> + if (ddp->data->mutex_mod[id] < 32) {
> + offset = DISP_REG_MUTEX_MOD(ddp->data, mutex->id);
> reg = readl_relaxed(ddp->regs + offset);
> - reg |= 1 << ddp->mutex_mod[id];
> + reg |= 1 << ddp->data->mutex_mod[id];
> writel_relaxed(reg, ddp->regs + offset);
> } else {
> offset = DISP_REG_MUTEX_MOD2(mutex->id);
> reg = readl_relaxed(ddp->regs + offset);
> - reg |= 1 << (ddp->mutex_mod[id] - 32);
> + reg |= 1 << (ddp->data->mutex_mod[id] - 32);
> writel_relaxed(reg, ddp->regs + offset);
> }
> return;
> }
>
> - writel_relaxed(reg, ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> + writel_relaxed(ddp->data->mutex_sof[reg],
> + ddp->regs + DISP_REG_MUTEX_SOF(ddp->data, mutex->id));
> }
>
> void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
> @@ -499,18 +566,19 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
> case DDP_COMPONENT_DPI0:
> case DDP_COMPONENT_DPI1:
> writel_relaxed(MUTEX_SOF_SINGLE_MODE,
> - ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> + ddp->regs +
> + DISP_REG_MUTEX_SOF(ddp->data, mutex->id));
> break;
> default:
> - if (ddp->mutex_mod[id] < 32) {
> - offset = DISP_REG_MUTEX_MOD(mutex->id);
> + if (ddp->data->mutex_mod[id] < 32) {
> + offset = DISP_REG_MUTEX_MOD(ddp->data, mutex->id);
> reg = readl_relaxed(ddp->regs + offset);
> - reg &= ~(1 << ddp->mutex_mod[id]);
> + reg &= ~(1 << ddp->data->mutex_mod[id]);
> writel_relaxed(reg, ddp->regs + offset);
> } else {
> offset = DISP_REG_MUTEX_MOD2(mutex->id);
> reg = readl_relaxed(ddp->regs + offset);
> - reg &= ~(1 << (ddp->mutex_mod[id] - 32));
> + reg &= ~(1 << (ddp->data->mutex_mod[id] - 32));
> writel_relaxed(reg, ddp->regs + offset);
> }
> break;
> @@ -585,7 +653,7 @@ static int mtk_ddp_probe(struct platform_device *pdev)
> return PTR_ERR(ddp->regs);
> }
>
> - ddp->mutex_mod = of_device_get_match_data(dev);
> + ddp->data = of_device_get_match_data(dev);
>
> platform_set_drvdata(pdev, ddp);
>
> @@ -598,9 +666,12 @@ static int mtk_ddp_remove(struct platform_device *pdev)
> }
>
> static const struct of_device_id ddp_driver_dt_match[] = {
> - { .compatible = "mediatek,mt2701-disp-mutex", .data = mt2701_mutex_mod},
> - { .compatible = "mediatek,mt2712-disp-mutex", .data = mt2712_mutex_mod},
> - { .compatible = "mediatek,mt8173-disp-mutex", .data = mt8173_mutex_mod},
> + { .compatible = "mediatek,mt2701-disp-mutex",
> + .data = &mt2701_ddp_driver_data},
> + { .compatible = "mediatek,mt2712-disp-mutex",
> + .data = &mt2712_ddp_driver_data},
> + { .compatible = "mediatek,mt8173-disp-mutex",
> + .data = &mt8173_ddp_driver_data},
> {},
> };
> MODULE_DEVICE_TABLE(of, ddp_driver_dt_match);
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next prev parent reply other threads:[~2018-12-26 2:57 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1545638931-24938-1-git-send-email-yongqiang.niu@mediatek.com>
[not found] ` <1545638931-24938-4-git-send-email-yongqiang.niu@mediatek.com>
2018-12-25 3:57 ` [PATCH 03/18] drm/mediatek: redefine mtk_ddp_sout_sel Nicolas Boichat
2019-03-15 2:06 ` Yongqiang Niu
2019-03-15 3:22 ` Nicolas Boichat
[not found] ` <1545638931-24938-11-git-send-email-yongqiang.niu@mediatek.com>
2018-12-25 4:15 ` [PATCH 10/18] drm/mediatek: add gmc_bits for ovl private data Nicolas Boichat
2019-03-15 2:34 ` Yongqiang Niu
2019-03-15 3:26 ` Nicolas Boichat
[not found] ` <1545638931-24938-17-git-send-email-yongqiang.niu@mediatek.com>
2018-12-25 4:19 ` [PATCH 16/18] drm/mediatek: add function mtk_ddp_comp_get_type Nicolas Boichat
[not found] ` <1545638931-24938-18-git-send-email-yongqiang.niu@mediatek.com>
2018-12-25 4:22 ` [PATCH 17/18] drm/mediatek: add ovl0/ovl0_2l usecase Nicolas Boichat
[not found] ` <1545638931-24938-2-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 1:49 ` [PATCH 01/18] drm/mediatek: update dt-bindings for mt8183 CK Hu
[not found] ` <1545638931-24938-3-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 2:56 ` CK Hu [this message]
[not found] ` <1545638931-24938-5-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 3:51 ` [PATCH 04/18] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel CK Hu
[not found] ` <1545638931-24938-6-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 5:27 ` [PATCH 05/18] drm/mediatek: add ddp component CCORR CK Hu
[not found] ` <1545638931-24938-7-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 6:01 ` [PATCH 06/18] drm/mediatek: add mmsys private data for ddp path config CK Hu
[not found] ` <1545638931-24938-8-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 9:09 ` [PATCH 07/18] drm/mediatek: add commponent OVL0_2L CK Hu
[not found] ` <1545638931-24938-10-git-send-email-yongqiang.niu@mediatek.com>
2018-12-26 9:13 ` [PATCH 09/18] drm/mediatek: add component DITHER CK Hu
[not found] ` <1545638931-24938-12-git-send-email-yongqiang.niu@mediatek.com>
2018-12-27 1:16 ` [PATCH 11/18] drm/medaitek: add layer_nr for ovl private data CK Hu
[not found] ` <1545638931-24938-14-git-send-email-yongqiang.niu@mediatek.com>
2018-12-27 4:26 ` [PATCH 13/18] drm/mediatek: add ddp write register common api CK Hu
[not found] ` <1545638931-24938-15-git-send-email-yongqiang.niu@mediatek.com>
2018-12-27 4:56 ` [PATCH 14/18] drm/mediatek: add connect function for ovl CK Hu
[not found] ` <1545638931-24938-16-git-send-email-yongqiang.niu@mediatek.com>
2018-12-27 8:08 ` [PATCH 15/18] drm/mediatek: add RDMA1 fifo size into RDMA private data CK Hu
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