From: Abel Vesa <abel.vesa@nxp.com>
To: Mike Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <kernel@pengutronix.de>,
Lucas Stach <l.stach@pengutronix.de>,
Angus Ainslie <angus.ainslie@puri.sm>,
Rob Herring <robh@kernel.org>
Cc: Abel Vesa <abel.vesa@nxp.com>, Anson Huang <anson.huang@nxp.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
dl-linux-imx <linux-imx@nxp.com>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH v2 1/3] clk: imx: imx8mq: Fix the rate propagation for arm pll
Date: Fri, 15 Feb 2019 17:48:43 +0000 [thread overview]
Message-ID: <1550252913-24532-2-git-send-email-abel.vesa@nxp.com> (raw)
In-Reply-To: <1550252913-24532-1-git-send-email-abel.vesa@nxp.com>
The arm pll bypass needs to propagate the rate upwards
in order for the cpufreq to work.
Fixes: b80522040cd3f ("clk: imx: Add clock driver for i.MX8MQ CCM")
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/clk/imx/clk-imx8mq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index 398ab0b..57499ed 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -340,7 +340,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
clks[IMX8MQ_DRAM_PLL2_DIV] = imx_clk_divider("dram_pll2_div", "dram_pll2", base + 0x68, 1, 6);
/* PLL bypass out */
- clks[IMX8MQ_ARM_PLL_BYPASS] = imx_clk_mux("arm_pll_bypass", base + 0x28, 14, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels));
+ clks[IMX8MQ_ARM_PLL_BYPASS] = imx_clk_mux_flags("arm_pll_bypass", base + 0x28, 14, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT);
clks[IMX8MQ_GPU_PLL_BYPASS] = imx_clk_mux("gpu_pll_bypass", base + 0x18, 14, 1, gpu_pll_bypass_sels, ARRAY_SIZE(gpu_pll_bypass_sels));
clks[IMX8MQ_VPU_PLL_BYPASS] = imx_clk_mux("vpu_pll_bypass", base + 0x20, 14, 1, vpu_pll_bypass_sels, ARRAY_SIZE(vpu_pll_bypass_sels));
clks[IMX8MQ_AUDIO_PLL1_BYPASS] = imx_clk_mux("audio_pll1_bypass", base + 0x0, 14, 1, audio_pll1_bypass_sels, ARRAY_SIZE(audio_pll1_bypass_sels));
--
2.7.4
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next prev parent reply other threads:[~2019-02-15 17:49 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-15 17:48 [PATCH v2 0/3] Necessary i.MX8MQ clock updates in order to support cpufreq Abel Vesa
2019-02-15 17:48 ` Abel Vesa [this message]
2019-02-21 20:44 ` [PATCH v2 1/3] clk: imx: imx8mq: Fix the rate propagation for arm pll Stephen Boyd
2019-02-15 17:48 ` [PATCH v2 2/3] dt-bindings: imx8mq-clock: Add the missing ARM clock Abel Vesa
2019-02-21 20:40 ` Stephen Boyd
2019-02-15 17:48 ` [PATCH v2 3/3] clk: imx8mq: " Abel Vesa
2019-02-21 20:44 ` Stephen Boyd
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