From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CF26C43381 for ; Mon, 11 Mar 2019 09:43:41 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 317142084F for ; Mon, 11 Mar 2019 09:43:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="pYdgcpww" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 317142084F Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=PHU2ExCxbF+EKXRkdJZwGG1MXn3XU1VDpyNSt3PZ/kk=; b=pYdgcpwwWdWw0l SKtNS2u4s/Qt1gQVFeuNQI7mZClJpXK01G3qDGJQ2f7oeNBrSHr6ChnHOkxrOTpu8NVAeDH8gv0SD 6njIWu2ZFUBovgiIYg5vi4seDreA//C+ToffgX6Ay+UR47I1J6QPXE5Bhcr6yhYmppR4ABqTCsPr2 poEn+BqIM0WHXCBiZe4H0xsBo1MD+xs4KiZJO5UfySv0Kw9teN8oLTG68mRTdJjxURpFnWV31zYQO IUPMmI/PQ63DYQtsiYXbHLKPgZtUALwlAq/hD9vSyhDV0XpQCalw1DleW4Y87H3cfTL4IsG2Tnztc 55l98gKv0yjMx4WgdyIg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h3HT5-0000ow-HI; Mon, 11 Mar 2019 09:43:35 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h3HT1-0000oZ-SI; Mon, 11 Mar 2019 09:43:33 +0000 X-UUID: bdb820dda69b423ba9938af17b723a0b-20190311 X-UUID: bdb820dda69b423ba9938af17b723a0b-20190311 Received: from mtkcas67.mediatek.inc [(172.29.193.45)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 810073130; Mon, 11 Mar 2019 01:43:22 -0800 Received: from MTKMBS31N2.mediatek.inc (172.27.4.87) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 11 Mar 2019 02:43:20 -0700 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 11 Mar 2019 17:43:17 +0800 Received: from [10.17.3.153] (172.27.4.253) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 11 Mar 2019 17:43:16 +0800 Message-ID: <1552297396.12703.2.camel@mhfsdcap03> Subject: Re: [PATCH v6 6/6] dts: arm64: mt8183: Add I2C nodes From: Qii Wang To: Nicolas Boichat Date: Mon, 11 Mar 2019 17:43:16 +0800 In-Reply-To: References: <1552282840-12778-1-git-send-email-qii.wang@mediatek.com> <1552282840-12778-7-git-send-email-qii.wang@mediatek.com> X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190311_024331_948174_5768914F X-CRM114-Status: GOOD ( 14.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, srv_heupstream , wsa@the-dreams.de, Leilk Liu , xinping.qian@mediatek.com, lkml , liguo.zhang@mediatek.com, "moderated list:ARM/Mediatek SoC support" , linux-i2c@vger.kernel.org, Rob Herring , linux-arm Mailing List Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 2019-03-11 at 16:36 +0800, Nicolas Boichat wrote: > On Mon, Mar 11, 2019 at 1:41 PM Qii Wang wrote: > > > > This patch adds nodes for I2C controller. > > > > Signed-off-by: Qii Wang > > --- > > This applies on top of some other uncommitted series, right? This is > fine, but please say which one. > https://patchwork.kernel.org/cover/10846715/ This series are based on 5.0-rc1(i2c/for-next) and these series http://lists.infradead.org/pipermail/linux-mediatek/2019-February/017570.html http://lists.infradead.org/pipermail/linux-mediatek/2019-February/017320.html > > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 190 ++++++++++++++++++++++++++++++ > > 1 file changed, 190 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > index 165b859..f20f1af 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > @@ -16,6 +16,21 @@ > > #address-cells = <2>; > > #size-cells = <2>; > > > > + aliases { > > + i2c0 = &i2c0; > > + i2c1 = &i2c1; > > + i2c2 = &i2c2; > > + i2c3 = &i2c3; > > + i2c4 = &i2c4; > > + i2c5 = &i2c5; > > + i2c6 = &i2c6; > > + i2c7 = &i2c7; > > + i2c8 = &i2c8; > > + i2c9 = &i2c9; > > + i2c10 = &i2c10; > > + i2c11 = &i2c11; > > + }; > > + > > cpus { > > #address-cells = <1>; > > #size-cells = <0>; > > @@ -268,6 +283,79 @@ > > status = "disabled"; > > }; > > > > + i2c6: i2c@11005000 { > > + compatible = "mediatek,mt8183-i2c"; > > + reg = <0 0x11005000 0 0x1000>, > > + <0 0x11000600 0 0x80>; > > + interrupts = ; > > + clocks = <&infracfg CLK_INFRA_I2C6>, > > + <&infracfg CLK_INFRA_AP_DMA>; > > + clock-names = "main", "dma"; > > + clock-div = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + status = "disabled"; > > + }; > > + > > + i2c0: i2c@11007000 { > > + compatible = "mediatek,mt8183-i2c"; > > + reg = <0 0x11007000 0 0x1000>, > > + <0 0x11000080 0 0x80>; > > + interrupts = ; > > + clocks = <&infracfg CLK_INFRA_I2C0>, > > + <&infracfg CLK_INFRA_AP_DMA>; > > + clock-names = "main", "dma"; > > + clock-div = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + status = "disabled"; > > + }; > > + > > + i2c4: i2c@11008000 { > > + compatible = "mediatek,mt8183-i2c"; > > + id = <4>; > > + reg = <0 0x11008000 0 0x1000>, > > + <0 0x11000100 0 0x80>; > > + interrupts = ; > > + clocks = <&infracfg CLK_INFRA_I2C1>, > > + <&infracfg CLK_INFRA_AP_DMA>, > > + <&infracfg CLK_INFRA_I2C1_ARBITER>; > > + clock-names = "main", "dma","arb"; > > + clock-div = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + status = "disabled"; > > + }; > > + > > + i2c2: i2c@11009000 { > > + compatible = "mediatek,mt8183-i2c"; > > + reg = <0 0x11009000 0 0x1000>, > > + <0 0x11000280 0 0x80>; > > + interrupts = ; > > + clocks = <&infracfg CLK_INFRA_I2C2>, > > + <&infracfg CLK_INFRA_AP_DMA>, > > + <&infracfg CLK_INFRA_I2C2_ARBITER>; > > + clock-names = "main", "dma", "arb"; > > + clock-div = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + status = "disabled"; > > + }; > > + > > + i2c3: i2c@1100f000 { > > + compatible = "mediatek,mt8183-i2c"; > > + reg = <0 0x1100f000 0 0x1000>, > > + <0 0x11000400 0 0x80>; > > + interrupts = ; > > + clocks = <&infracfg CLK_INFRA_I2C3>, > > + <&infracfg CLK_INFRA_AP_DMA>; > > + clock-names = "main", "dma"; > > + clock-div = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + status = "disabled"; > > + }; > > + > > spi0: spi@1100a000 { > > compatible = "mediatek,mt8183-spi"; > > #address-cells = <1>; > > @@ -294,6 +382,20 @@ > > status = "disabled"; > > }; > > > > + i2c1: i2c@11011000 { > > + compatible = "mediatek,mt8183-i2c"; > > + reg = <0 0x11011000 0 0x1000>, > > + <0 0x11000480 0 0x80>; > > + interrupts = ; > > + clocks = <&infracfg CLK_INFRA_I2C4>, > > + <&infracfg CLK_INFRA_AP_DMA>; > > + clock-names = "main", "dma"; > > + clock-div = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + status = "disabled"; > > + }; > > + > > spi2: spi@11012000 { > > compatible = "mediatek,mt8183-spi"; > > #address-cells = <1>; > > @@ -320,6 +422,66 @@ > > status = "disabled"; > > }; > > > > + i2c9: i2c@11014000 { > > + compatible = "mediatek,mt8183-i2c"; > > + reg = <0 0x11014000 0 0x1000>, > > + <0 0x11000180 0 0x80>; > > + interrupts = ; > > + clocks = <&infracfg CLK_INFRA_I2C1_IMM>, > > + <&infracfg CLK_INFRA_AP_DMA>, > > + <&infracfg CLK_INFRA_I2C1_ARBITER>; > > + clock-names = "main", "dma", "arb"; > > + clock-div = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + status = "disabled"; > > + }; > > + > > + i2c10: i2c@11015000 { > > + compatible = "mediatek,mt8183-i2c"; > > + reg = <0 0x11015000 0 0x1000>, > > + <0 0x11000300 0 0x80>; > > + interrupts = ; > > + clocks = <&infracfg CLK_INFRA_I2C2_IMM>, > > + <&infracfg CLK_INFRA_AP_DMA>, > > + <&infracfg CLK_INFRA_I2C2_ARBITER>; > > + clock-names = "main", "dma", "arb"; > > + clock-div = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + status = "disabled"; > > + }; > > + > > + i2c5: i2c@11016000 { > > + compatible = "mediatek,mt8183-i2c"; > > + reg = <0 0x11016000 0 0x1000>, > > + <0 0x11000500 0 0x80>; > > + interrupts = ; > > + clocks = <&infracfg CLK_INFRA_I2C5>, > > + <&infracfg CLK_INFRA_AP_DMA>, > > + <&infracfg CLK_INFRA_I2C5_ARBITER>; > > + clock-names = "main", "dma", "arb"; > > + clock-div = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + status = "disabled"; > > + }; > > + > > + i2c11: i2c@11017000 { > > + compatible = "mediatek,mt8183-i2c"; > > + reg = <0 0x11017000 0 0x1000>, > > + <0 0x11000580 0 0x80>; > > + interrupts = ; > > + clocks = <&infracfg CLK_INFRA_I2C5_IMM>, > > + <&infracfg CLK_INFRA_AP_DMA>, > > + <&infracfg CLK_INFRA_I2C5_ARBITER>; > > + clock-names = "main", "dma", "arb"; > > + clock-div = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + status = "disabled"; > > + }; > > + > > spi4: spi@11018000 { > > compatible = "mediatek,mt8183-spi"; > > #address-cells = <1>; > > @@ -346,6 +508,34 @@ > > status = "disabled"; > > }; > > > > + i2c7: i2c@1101a000 { > > + compatible = "mediatek,mt8183-i2c"; > > + reg = <0 0x1101a000 0 0x1000>, > > + <0 0x11000680 0 0x80>; > > + interrupts = ; > > + clocks = <&infracfg CLK_INFRA_I2C7>, > > + <&infracfg CLK_INFRA_AP_DMA>; > > + clock-names = "main", "dma"; > > + clock-div = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + status = "disabled"; > > + }; > > + > > + i2c8: i2c@1101b000 { > > + compatible = "mediatek,mt8183-i2c"; > > + reg = <0 0x1101b000 0 0x1000>, > > + <0 0x11000700 0 0x80>; > > + interrupts = ; > > + clocks = <&infracfg CLK_INFRA_I2C8>, > > + <&infracfg CLK_INFRA_AP_DMA>; > > + clock-names = "main", "dma"; > > + clock-div = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + status = "disabled"; > > + }; > > + > > audiosys: syscon@11220000 { > > compatible = "mediatek,mt8183-audiosys", "syscon"; > > reg = <0 0x11220000 0 0x1000>; > > -- > > 1.7.9.5 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel