From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 198EBC10F03 for ; Wed, 13 Mar 2019 15:51:22 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DDE03206BA for ; Wed, 13 Mar 2019 15:51:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="kyOCSd9K" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DDE03206BA Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=OeusKzZLSbVTyLwKlWt0HCla2wOpT4jd18huL1Q9KL8=; b=kyOCSd9KYUiI8e Q/7K3AsMwT4F0aYIirPk9LIrcHEwhR9s19afdy0JFzH+O6lOay56Tu90kDuzn0LRTgSQ8e7GHx2yo qcIxVVm/5LmFtrdh24lBz9a2fkCxGAZGNv23Wp9lL/O/zrEgRv/a83clC70JLg9pTOQbH5Nw0dAlM komSN/y5jRCVhkDYNtApMIpnCpB9EruQ89UiQ23FBNNGoEoaEYqUJPGCMVCKd1MuzliXlxwiuuayU ePl8LSzGU+ZTh36IZWMf6biP3VcH3CVJJSoqfrT3gj6Jt+21Iq+Fpc6PjZ+uUV5cHabi2IdIVMd3Y LIO/fywm2OfuYskBH9Rw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h469z-0007e6-DQ; Wed, 13 Mar 2019 15:51:15 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h469w-0007cz-70 for linux-arm-kernel@lists.infradead.org; Wed, 13 Mar 2019 15:51:14 +0000 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x2DFk4QD027588; Wed, 13 Mar 2019 16:51:02 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2r71mb959h-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 13 Mar 2019 16:51:02 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id DA69738; Wed, 13 Mar 2019 15:51:00 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A3DF853F0; Wed, 13 Mar 2019 15:51:00 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.435.0; Wed, 13 Mar 2019 16:51:00 +0100 Received: from localhost (10.201.23.25) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Wed, 13 Mar 2019 16:51:00 +0100 From: Fabien Dessenne To: Ohad Ben-Cohen , Bjorn Andersson , Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre Torgue , Jonathan Corbet , , , , , , Subject: [PATCH 0/6] hwspinlock: allow sharing of hwspinlocks Date: Wed, 13 Mar 2019 16:50:31 +0100 Message-ID: <1552492237-28810-1-git-send-email-fabien.dessenne@st.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.201.23.25] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-13_09:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190313_085112_543895_74C5E15A X-CRM114-Status: GOOD ( 14.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Benjamin Gaignard , Fabien Dessenne Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org The current implementation does not allow two different devices to use a common hwspinlock. This patch set proposes to have, as an option, some hwspinlocks shared between several users. Below is an example that explain the need for this: exti: interrupt-controller@5000d000 { compatible = "st,stm32mp1-exti", "syscon"; interrupt-controller; #interrupt-cells = <2>; reg = <0x5000d000 0x400>; hwlocks = <&hsem 1>; }; The two drivers (stm32mp1-exti and syscon) refer to the same hwlock. With the current hwspinlock implementation, only the first driver succeeds in requesting (hwspin_lock_request_specific) the hwlock. The second request fails. The proposed approach does not modify the API, but extends the DT 'hwlocks' property with a second optional parameter (the first one identifies an hwlock) that specifies whether an hwlock is requested for exclusive usage (current behavior) or can be shared between several users. Examples: hwlocks = <&hsem 8>; Ref to hwlock #8 for exclusive usage hwlocks = <&hsem 8 0>; Ref to hwlock #8 for exclusive (0) usage hwlocks = <&hsem 8 1>; Ref to hwlock #8 for shared (1) usage As a constraint, the #hwlock-cells value must be 1 or 2. In the current implementation, this can have theorically any value but: - all of the exisiting drivers use the same value : 1. - the framework supports only one value : 1 (see implementation of of_hwspin_lock_simple_xlate()) Hence, it shall not be a problem to restrict this value to 1 or 2 since it won't break any driver. Fabien Dessenne (6): dt-bindings: hwlock: add support of shared locks hwspinlock: allow sharing of hwspinlocks dt-bindings: hwlock: update STM32 #hwlock-cells value ARM: dts: stm32: Add hwspinlock node for stm32mp157 SoC ARM: dts: stm32: Add hwlock for irqchip on stm32mp157 ARM: dts: stm32: hwlocks for GPIO for stm32mp157 .../devicetree/bindings/hwlock/hwlock.txt | 27 +++++-- .../bindings/hwlock/st,stm32-hwspinlock.txt | 6 +- Documentation/hwspinlock.txt | 10 ++- arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 2 + arch/arm/boot/dts/stm32mp157c.dtsi | 10 +++ drivers/hwspinlock/hwspinlock_core.c | 82 +++++++++++++++++----- drivers/hwspinlock/hwspinlock_internal.h | 2 + 7 files changed, 108 insertions(+), 31 deletions(-) -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel