From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 215F0C10F13 for ; Thu, 11 Apr 2019 06:48:38 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E176C20873 for ; Thu, 11 Apr 2019 06:48:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="WYrdxLM7" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E176C20873 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=BS0g3FS0bmPvCDwMTKpyKruOUOWswVUNq3b9i9Zs274=; b=WYrdxLM7Z+IZf1 m5fGdCyiwGPaWyXmwJ3Bujmm7xN4xmwiD8QQic7YBThD383tnf8l3vOKWQmg+3NSjfOnKlYODuVRi pVGLWFUais5FAnLzQ9ZEQ8ngnsUQB/TeNDT8A7UWMn1vKvvAhMYc2lznYMPnSZffehV/Hospx1NXW WkV2hCVvQ79JV78IVT5mK4znWqpIcEDeuDqkM5yCqiqkQNFpgca/l9jN6GkdkLCK+j6WVVRar2Uue zKpIn24j2SiBqvaPKJfpHwaKW8dicbopRxqaGzq50CqEOCIeFSidHKr0zbyJGigQHgDQTqh09de5p xISCLjetUysqVHPpr1nQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hETVl-0004xD-48; Thu, 11 Apr 2019 06:48:37 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hETVh-0004wK-B1; Thu, 11 Apr 2019 06:48:34 +0000 X-UUID: 4b7a9970122f43f59062fd92c82ca3f6-20190410 X-UUID: 4b7a9970122f43f59062fd92c82ca3f6-20190410 Received: from mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 83225026; Wed, 10 Apr 2019 22:48:20 -0800 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 10 Apr 2019 23:48:18 -0700 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 11 Apr 2019 14:48:11 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 11 Apr 2019 14:48:11 +0800 Message-ID: <1554965291.4768.10.camel@mtksdaap41> Subject: Re: [PATCH v2 13/25] drm/mediatek: add gmc_bits for ovl private data From: CK Hu To: Date: Thu, 11 Apr 2019 14:48:11 +0800 In-Reply-To: <1553667561-25447-14-git-send-email-yongqiang.niu@mediatek.com> References: <1553667561-25447-1-git-send-email-yongqiang.niu@mediatek.com> <1553667561-25447-14-git-send-email-yongqiang.niu@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190410_234833_385576_D83C146A X-CRM114-Status: GOOD ( 14.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Bibby.Hsieh@mediatek.com, airlied@linux.ie, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, yt.shen@mediatek.com, robh+dt@kernel.org, linux-mediatek@lists.infradead.org, p.zabel@pengutronix.de, matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu > > This patch add gmc_bits for ovl private data > GMC register was set RDMA ultra and pre-ultra threshold. > 10bit GMC register define is different with other SOC, gmc_thrshd_l not > used. Reviewed-by: CK Hu > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 23 +++++++++++++++++++++-- > 1 file changed, 21 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > index 28d1911..afb313c 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > @@ -39,7 +39,9 @@ > #define DISP_REG_OVL_ADDR_MT8173 0x0f40 > #define DISP_REG_OVL_ADDR(ovl, n) ((ovl)->data->addr + 0x20 * (n)) > > -#define OVL_RDMA_MEM_GMC 0x40402020 > +#define GMC_THRESHOLD_BITS 16 > +#define GMC_THRESHOLD_HIGH ((1 << GMC_THRESHOLD_BITS) / 4) > +#define GMC_THRESHOLD_LOW ((1 << GMC_THRESHOLD_BITS) / 8) > > #define OVL_CON_BYTE_SWAP BIT(24) > #define OVL_CON_MTX_YUV_TO_RGB (6 << 16) > @@ -57,6 +59,7 @@ > > struct mtk_disp_ovl_data { > unsigned int addr; > + unsigned int gmc_bits; > bool fmt_rgb565_is_0; > }; > > @@ -140,9 +143,23 @@ static unsigned int mtk_ovl_layer_nr(struct mtk_ddp_comp *comp) > static void mtk_ovl_layer_on(struct mtk_ddp_comp *comp, unsigned int idx) > { > unsigned int reg; > + unsigned int gmc_thrshd_l; > + unsigned int gmc_thrshd_h; > + unsigned int gmc_value; > + struct mtk_disp_ovl *ovl = comp_to_ovl(comp); > > writel(0x1, comp->regs + DISP_REG_OVL_RDMA_CTRL(idx)); > - writel(OVL_RDMA_MEM_GMC, comp->regs + DISP_REG_OVL_RDMA_GMC(idx)); > + > + gmc_thrshd_l = GMC_THRESHOLD_LOW >> > + (GMC_THRESHOLD_BITS - ovl->data->gmc_bits); > + gmc_thrshd_h = GMC_THRESHOLD_HIGH >> > + (GMC_THRESHOLD_BITS - ovl->data->gmc_bits); > + if (ovl->data->gmc_bits == 10) > + gmc_value = gmc_thrshd_h | gmc_thrshd_h << 16; > + else > + gmc_value = gmc_thrshd_l | gmc_thrshd_l << 8 | > + gmc_thrshd_h << 16 | gmc_thrshd_h << 24; > + writel(gmc_value, comp->regs + DISP_REG_OVL_RDMA_GMC(idx)); > > reg = readl(comp->regs + DISP_REG_OVL_SRC_CON); > reg = reg | BIT(idx); > @@ -324,11 +341,13 @@ static int mtk_disp_ovl_remove(struct platform_device *pdev) > > static const struct mtk_disp_ovl_data mt2701_ovl_driver_data = { > .addr = DISP_REG_OVL_ADDR_MT2701, > + .gmc_bits = 8, > .fmt_rgb565_is_0 = false, > }; > > static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = { > .addr = DISP_REG_OVL_ADDR_MT8173, > + .gmc_bits = 8, > .fmt_rgb565_is_0 = true, > }; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel