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Papadakos" Subject: Re: [PATCH 1/2] stmmac: introduce flag to dynamically disable TX offload for rockchip devices To: Robin Murphy Message-Id: <1555016970.28872.0@gmail.com> In-Reply-To: <1554489537.1199.0@gmail.com> References: <20190401181840.31255-1-papadakospan@gmail.com> <9d65a22a-2288-dc53-0059-ec4a31424dd8@arm.com> <2312344.mOsv7YkeBG@diego> <9EC67532-2D43-4AAD-BFA7-8B6797067427@theobroma-systems.com> <78EB27739596EE489E55E81C33FEC33A0B421348@de02wembxa.internal.synopsys.com> <4a9839d6-3d90-4354-7b64-78d5c1126e99@arm.com> <78EB27739596EE489E55E81C33FEC33A0B423811@de02wembxa.internal.synopsys.com> <1554245296.1271.0@gmail.com> <78EB27739596EE489E55E81C33FEC33A0B4254A0@de02wembxa.internal.synopsys.com> <1554305721.1328.0@gmail.com> <1554306954.1328.1@gmail.com> <78EB27739596EE489E55E81C33FEC33A0B44985F@DE02WEMBXB.internal.synopsys.com> <1554488052.1193.1@gmail.com> <85c1d945-d49b-3350-6ff4-a058c5a8c1d7@arm.com> <1554489537.1199.0@gmail.com> X-Mailer: geary/3.32.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190411_140939_190729_F8F4ADCF X-CRM114-Status: UNSURE ( 9.82 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jose Abreu , Alexandre Torgue , netdev@vger.kernel.org, LKML , Christoph =?iso-8859-1?q?M=FCllner?= , Klaus Goger , Maxime Coquelin , Philipp Tomsich , Linux ARM , Heiko =?iso-8859-1?q?St=FCbner?= Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org At this point I've settled on snps,txpbl = <0x20> by itself. If I increase the MTU from the default of 1500 I get a stack trace and link reset almost immediately: (https://pastebin.com/raw/5JBtfWei) whether TX Checksumming is ON or OFF. That said, with the default MTU, I get better speeds when TX Checksumming is on and the PBL tweak is set. Is there a better option in the horizon for the near future? At least for the Renegade (the only board I have to test) it can serve as a temporary workaround. Should I make a patch to replace force_thresh_dma_mode with txbpl <0x20> for the Renegade specifically? In any case I would be happy to help as much as I can to figure out if it's a board specific thing, or SoC, or even an issue of the Ethernet device itself. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel