From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Stephen Boyd <sboyd@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
Nicolas Boichat <drinkcat@chromium.org>,
srv_heupstream@mediatek.com,
James Liao <jamesjj.liao@mediatek.com>,
Stephen Boyd <sboyd@codeaurora.org>,
linux-kernel@vger.kernel.org, stable@vger.kernel.org,
Fan Chen <fan.chen@mediatek.com>,
linux-mediatek@lists.infradead.org,
Matthias Brugger <matthias.bgg@gmail.com>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 6/9] clk: mediatek: Add flags support for mtk_gate data
Date: Fri, 12 Apr 2019 10:42:17 +0800 [thread overview]
Message-ID: <1555036937.2654.5.camel@mtksdaap41> (raw)
In-Reply-To: <155501399858.20095.16525048679717411283@swboyd.mtv.corp.google.com>
On Thu, 2019-04-11 at 13:19 -0700, Stephen Boyd wrote:
> Quoting Weiyi Lu (2019-03-04 21:05:43)
> > On some Mediatek platforms, there are critical clocks of
> > clock gate type.
> > To register clock gate with flags CLK_IS_CRITICAL,
> > we need to add the flags field in mtk_gate data and register APIs.
> >
> > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
>
> This patch doesn't apply, because it's already there via commit
> 5a1cc4c27ad2 ("clk: mediatek: Add flags to mtk_gate").
>
Got it, but just catch a minor defect by 5a1cc4c27ad2 ("clk: mediatek:
Add flags to mtk_gate").
init.flags = CLK_SET_RATE_PARENT;
...
init.flags = flags;
I'll send a fix later.
Thanks for the help on the MT8183 clk series.
>
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> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
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next prev parent reply other threads:[~2019-04-12 2:42 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-05 5:05 [PATCH v5 0/9] Mediatek MT8183 clock support Weiyi Lu
2019-03-05 5:05 ` Weiyi Lu
2019-03-05 18:41 ` Stephen Boyd
2019-03-05 5:05 ` [PATCH v5 1/9] clk: mediatek: Disable tuner_en before change PLL rate Weiyi Lu
2019-03-05 6:42 ` James Liao
2019-03-07 16:09 ` Matthias Brugger
2019-04-11 20:16 ` Stephen Boyd
2019-03-05 5:05 ` [PATCH v5 2/9] clk: mediatek: Add new clkmux register API Weiyi Lu
2019-03-05 6:43 ` James Liao
2019-03-08 6:17 ` Nicolas Boichat
2019-03-14 23:21 ` Nicolas Boichat
2019-04-11 20:12 ` Stephen Boyd
2019-04-11 20:16 ` Stephen Boyd
2019-03-05 5:05 ` [PATCH v5 3/9] clk: mediatek: Add configurable pcwibits and fmin to mtk_pll_data Weiyi Lu
2019-03-05 6:46 ` James Liao
2019-03-08 6:20 ` Nicolas Boichat
2019-04-11 20:14 ` Stephen Boyd
2019-04-11 20:16 ` Stephen Boyd
2019-03-05 5:05 ` [PATCH v5 4/9] dt-bindings: ARM: Mediatek: Document bindings for MT8183 Weiyi Lu
2019-03-05 5:05 ` [PATCH v5 5/9] clk: mediatek: Add dt-bindings for MT8183 clocks Weiyi Lu
2019-04-11 20:16 ` Stephen Boyd
2019-03-05 5:05 ` [PATCH v5 6/9] clk: mediatek: Add flags support for mtk_gate data Weiyi Lu
2019-03-05 6:47 ` James Liao
2019-03-08 6:20 ` Nicolas Boichat
2019-04-11 20:19 ` Stephen Boyd
2019-04-12 2:42 ` Weiyi Lu [this message]
2019-03-05 5:05 ` [PATCH v5 7/9] clk: mediatek: Add configurable pcw_chg_reg to mtk_pll_data Weiyi Lu
2019-03-05 6:47 ` James Liao
2019-03-08 6:23 ` Nicolas Boichat
2019-04-11 20:21 ` Stephen Boyd
2019-03-05 5:05 ` [PATCH v5 8/9] clk: mediatek: Add MT8183 clock support Weiyi Lu
2019-03-08 6:42 ` Nicolas Boichat
2019-03-08 14:46 ` Nicolas Boichat
2019-04-11 20:24 ` Stephen Boyd
2019-04-11 20:24 ` Stephen Boyd
2019-03-05 5:05 ` [PATCH v5 9/9] clk: mediatek: Allow changing PLL rate when it is off Weiyi Lu
2019-03-05 6:48 ` James Liao
2019-04-11 20:24 ` Stephen Boyd
2019-03-28 5:18 ` [PATCH v5 0/9] Mediatek MT8183 clock support Weiyi Lu
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