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Tue, 16 Apr 2019 16:00:47 +0800 Message-ID: <1555401647.11519.2.camel@mtksdaap41> Subject: Re: [PATCH v2 18/25] drm/mediatek: add RDMA fifo size error handle From: CK Hu To: Date: Tue, 16 Apr 2019 16:00:47 +0800 In-Reply-To: <1553667561-25447-19-git-send-email-yongqiang.niu@mediatek.com> References: <1553667561-25447-1-git-send-email-yongqiang.niu@mediatek.com> <1553667561-25447-19-git-send-email-yongqiang.niu@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: E900A9B331BE9A17B73B38784562106A167A14B97C92F255011EA9517FCE0B102000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190416_010119_022739_5D564E35 X-CRM114-Status: GOOD ( 14.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Bibby.Hsieh@mediatek.com, airlied@linux.ie, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, yt.shen@mediatek.com, robh+dt@kernel.org, linux-mediatek@lists.infradead.org, p.zabel@pengutronix.de, matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Yongqiang: On Wed, 2019-03-27 at 14:19 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu > > This patch add RDMA fifo size error handle > rdma fifo size will not always bigger than the calculated threshold > if that case happened, we need set fifo size as the threshold > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > index b0a5cff..ead38ba 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > @@ -137,11 +137,14 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, > { > unsigned int threshold; > unsigned int reg; > + unsigned int rdma_fifo_size; > struct mtk_disp_rdma *rdma = comp_to_rdma(comp); > > rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, 0xfff, width); > rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_1, 0xfffff, height); > > + rdma_fifo_size = RDMA_FIFO_SIZE(rdma); > + > /* > * Enable FIFO underflow since DSI and DPI can't be blocked. > * Keep the FIFO pseudo size reset default of 8 KiB. Set the > @@ -149,8 +152,12 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, > * account for blanking, and with a pixel depth of 4 bytes: > */ > threshold = width * height * vrefresh * 4 * 7 / 1000000; > + > + if (threshold > rdma_fifo_size) > + threshold = rdma_fifo_size; I think this is a work around not a correct solution. Why MT8173 has no this problem but MT8183 has? Is the formula of threshold different in MT8173 and MT8183? Regards, CK > + > reg = RDMA_FIFO_UNDERFLOW_EN | > - RDMA_FIFO_PSEUDO_SIZE(RDMA_FIFO_SIZE(rdma)) | > + RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) | > RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold); > writel(reg, comp->regs + DISP_REG_RDMA_FIFO_CON); > } _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel