Re: [PATCH v2 2/2] clk: reset: Modify reset-controller driver

[Eddie Huang <eddie.huang@mediatek.com>]

Hi Yong,

Please add reset controller maintainer in this mailing loop
  Philipp Zabel <p.zabel@pengutronix.de>


On Fri, 2019-04-26 at 15:10 +0800, Yong Liang wrote:
> From: "yong.liang" <yong.liang@mediatek.com>
> 
> Set reset signal by a register and clear reset signal by
> another register for 8183.

You should move your signed-off-by here, then add --- in next line to
avoid your notes appear in commit message when use git am to apply this
patch

> Base on https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git branch clk-next and https://patchwork.kernel.org/patch/10856987/
> 
> Changes in patch v2:
> Rollback modify for "_tuner_en_bit, _pcw_reg, _pcw_shift,"
> in drivers/clk/mediatek/clk-mt8183.c
> 
> Signed-off-by: yong.liang <yong.liang@mediatek.com>
> ---
>  drivers/clk/mediatek/clk-mt8183.c                  |   10 ++-
>  drivers/clk/mediatek/clk-mtk.h                     |    3 +
>  drivers/clk/mediatek/reset.c                       |   53 +++++++++++-
>  .../dt-bindings/reset-controller/mt8183-resets.h   |   89 ++++++++++++++++++++
>  4 files changed, 151 insertions(+), 4 deletions(-)
>  create mode 100644 include/dt-bindings/reset-controller/mt8183-resets.h
> 
> diff --git a/drivers/clk/mediatek/clk-mt8183.c b/drivers/clk/mediatek/clk-mt8183.c
> index 9d86510..cda5b91 100644
> --- a/drivers/clk/mediatek/clk-mt8183.c
> +++ b/drivers/clk/mediatek/clk-mt8183.c
> @@ -1156,6 +1156,7 @@ static int clk_mt8183_apmixed_probe(struct platform_device *pdev)
>  {
>  	struct clk_onecell_data *clk_data;
>  	struct device_node *node = pdev->dev.of_node;
> +	int r;
>  
>  	clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK);
>  
> @@ -1164,7 +1165,14 @@ static int clk_mt8183_apmixed_probe(struct platform_device *pdev)
>  	mtk_clk_register_gates(node, apmixed_clks, ARRAY_SIZE(apmixed_clks),
>  		clk_data);
>  
> -	return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
> +	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
> +	if (r)
> +		dev_err(&pdev->dev,
> +			"%s(): could not register clock provider: %d\n",__func__, r);
> +
> +	mtk_register_reset_controller_set_clr(node, 4, 0x120);
> +
> +	return r;
>  }

You should call mtk_register_reset_controller_set_clr function in
clk_mt8183_infra_probe

Eddie



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