From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Nicolas Boichat <drinkcat@chromium.org>
Cc: Rob Herring <robh@kernel.org>,
srv_heupstream <srv_heupstream@mediatek.com>,
James Liao <jamesjj.liao@mediatek.com>,
lkml <linux-kernel@vger.kernel.org>,
Fan Chen <fan.chen@mediatek.com>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v5 09/14] soc: mediatek: Add basic_clk_name to scp_power_data
Date: Wed, 19 Jun 2019 17:36:11 +0800 [thread overview]
Message-ID: <1560936971.2158.17.camel@mtksdaap41> (raw)
In-Reply-To: <CANMq1KDf6aCK4+VX070f1pB6knPT5M0kxbW_RJ0K7PtAvKWkLQ@mail.gmail.com>
On Thu, 2019-03-21 at 14:02 +0800, Nicolas Boichat wrote:
> On Tue, Mar 19, 2019 at 4:02 PM Weiyi Lu <weiyi.lu@mediatek.com> wrote:
> >
> > Try to stop extending the clk_id or clk_names if there are
> > more and more new BASIC clocks. To get its own clocks by the
> > basic_clk_name of each power domain.
> >
> > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
> > ---
> > drivers/soc/mediatek/mtk-scpsys.c | 27 +++++++++++++++++++--------
> > 1 file changed, 19 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
> > index 6bf846cb1893..c6360de4e41e 100644
> > --- a/drivers/soc/mediatek/mtk-scpsys.c
> > +++ b/drivers/soc/mediatek/mtk-scpsys.c
> > @@ -118,6 +118,8 @@ static const char * const clk_names[] = {
> > * @bus_prot_mask: The mask for single step bus protection.
> > * @clk_id: The basic clock needs to be enabled before enabling certain
> > * power domains.
> > + * @basic_clk_name: provide the same purpose with field "clk_id"
> > + * by declaring basic clock prefix name rather than clk_id.
> > * @caps: The flag for active wake-up action.
> > */
> > struct scp_domain_data {
> > @@ -128,6 +130,7 @@ struct scp_domain_data {
> > u32 sram_pdn_ack_bits;
> > u32 bus_prot_mask;
> > enum clk_id clk_id[MAX_CLKS];
> > + const char *basic_clk_name[MAX_CLKS];
>
> Either call them basic_clk_id/basic_clk_name, or clk_id/clk_name.
>
OK.
> > u8 caps;
> > };
> >
> > @@ -499,16 +502,24 @@ static struct scp *init_scp(struct platform_device *pdev,
> >
> > scpd->data = data;
> >
> > - for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) {
> > - struct clk *c = clk[data->clk_id[j]];
> > + if (data->clk_id[0]) {
>
> Since it's either clk_id or basic_clk_name, I wonder if it'd be good
> to add a WARN_ON here, e.g.
>
> WARN_ON(data->basic_clk_name[0]);
>
Thanks for the advise. I'll add it.
> > + for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) {
> > + struct clk *c = clk[data->clk_id[j]];
> >
> > - if (IS_ERR(c)) {
> > - dev_err(&pdev->dev, "%s: clk unavailable\n",
> > - data->name);
> > - return ERR_CAST(c);
> > - }
> > + if (IS_ERR(c)) {
> > + dev_err(&pdev->dev,
> > + "%s: clk unavailable\n",
> > + data->name);
> > + return ERR_CAST(c);
> > + }
> >
> > - scpd->clk[j] = c;
> > + scpd->clk[j] = c;
> > + }
> > + } else if (data->basic_clk_name[0]) {
> > + for (j = 0; j < MAX_CLKS &&
> > + data->basic_clk_name[j]; j++)
> > + scpd->clk[j] = devm_clk_get(&pdev->dev,
> > + data->basic_clk_name[j]);
> > }
> >
> > genpd->name = data->name;
> > --
> > 2.18.0
> >
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next prev parent reply other threads:[~2019-06-19 9:36 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-19 8:01 [PATCH v5 00/14] Mediatek MT8183 scpsys support Weiyi Lu
2019-03-19 8:01 ` [PATCH v5 01/14] dt-bindings: mediatek: Add property to mt8183 smi-common Weiyi Lu
2019-03-19 8:01 ` [PATCH v5 02/14] dt-bindings: soc: Add MT8183 power dt-bindings Weiyi Lu
2019-03-19 8:01 ` [PATCH v5 03/14] soc: mediatek: Switch to SPDX license identifier Weiyi Lu
2019-03-19 8:01 ` [PATCH v5 04/14] soc: mediatek: Refactor polling timeout and documentation Weiyi Lu
2019-03-19 11:45 ` Nicolas Boichat
2019-06-19 9:11 ` Weiyi Lu
2019-03-19 8:01 ` [PATCH v5 05/14] soc: mediatek: Refactor regulator control Weiyi Lu
2019-03-19 8:01 ` [PATCH v5 06/14] soc: mediatek: Refactor clock control Weiyi Lu
2019-03-19 12:02 ` Nicolas Boichat
2019-06-19 9:19 ` Weiyi Lu
2019-03-19 8:01 ` [PATCH v5 07/14] soc: mediatek: Refactor sram control Weiyi Lu
2019-03-19 12:07 ` Nicolas Boichat
2019-06-19 9:30 ` Weiyi Lu
2019-03-19 8:01 ` [PATCH v5 08/14] soc: mediatek: Refactor bus protection control Weiyi Lu
2019-03-19 12:09 ` Nicolas Boichat
2019-06-19 9:31 ` Weiyi Lu
2019-03-19 8:01 ` [PATCH v5 09/14] soc: mediatek: Add basic_clk_name to scp_power_data Weiyi Lu
2019-03-21 6:02 ` Nicolas Boichat
2019-06-19 9:36 ` Weiyi Lu [this message]
2019-03-19 8:01 ` [PATCH v5 10/14] soc: mediatek: Add multiple step bus protection control Weiyi Lu
2019-03-21 5:57 ` Nicolas Boichat
2019-06-19 9:43 ` Weiyi Lu
2019-03-19 8:01 ` [PATCH v5 11/14] soc: mediatek: Add subsys clock control for bus protection Weiyi Lu
2019-03-19 8:01 ` [PATCH v5 12/14] soc: mediatek: Add extra sram control Weiyi Lu
2019-03-19 8:01 ` [PATCH v5 13/14] soc: mediatek: Add MT8183 scpsys support Weiyi Lu
2019-03-19 8:01 ` [PATCH v5 14/14] arm64: dts: Add power controller device node of MT8183 Weiyi Lu
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