From: Xiongfeng Wang <wangxiongfeng2@huawei.com>
To: <rjw@rjwysocki.net>, <catalin.marinas@arm.com>, <james.morse@arm.com>
Cc: xiexiuqi@huawei.com, jonathan.cameron@huawei.com,
john.garry@huawei.com, linux-kernel@vger.kernel.org,
linux-acpi@vger.kernel.org, huawei.libin@huawei.com,
guohanjun@huawei.com, wangxiongfeng2@huawei.com,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH RFC 2/3] arm64: mark all the GICC nodes in MADT as possible cpu
Date: Fri, 28 Jun 2019 19:13:11 +0800 [thread overview]
Message-ID: <1561720392-45907-3-git-send-email-wangxiongfeng2@huawei.com> (raw)
In-Reply-To: <1561720392-45907-1-git-send-email-wangxiongfeng2@huawei.com>
We set 'cpu_possible_mask' based on the enabled GICC node in MADT. If
the GICC node is disabled, we will skip initializing the kernel data
structure for that CPU.
To support CPU hotplug, we need to initialize some CPU related data
structure in advance. This patch mark all the GICC nodes as possible CPU
and only these enabled GICC nodes as present CPU.
Signed-off-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
---
arch/arm64/kernel/setup.c | 2 +-
arch/arm64/kernel/smp.c | 11 +++++------
2 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index ec75d20..a82d0c2 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -391,7 +391,7 @@ static int __init topology_init(void)
for_each_online_node(i)
register_one_node(i);
- for_each_possible_cpu(i) {
+ for_each_online_cpu(i) {
struct cpu *cpu = &per_cpu(cpu_data.cpu, i);
cpu->hotpluggable = 1;
register_cpu(cpu, i);
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 7aa9471..854d32c 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -534,16 +534,14 @@ struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu)
{
u64 hwid = processor->arm_mpidr;
- if (!(processor->flags & ACPI_MADT_ENABLED)) {
- pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
- return;
- }
-
if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
return;
}
+ if (!(processor->flags & ACPI_MADT_ENABLED))
+ pr_debug("disabled CPU entry with 0x%llx MPIDR\n", hwid);
+
if (is_mpidr_duplicate(cpu_count, hwid)) {
pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
return;
@@ -764,7 +762,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
if (err)
continue;
- set_cpu_present(cpu, true);
+ if ((cpu_madt_gicc[cpu].flags & ACPI_MADT_ENABLED))
+ set_cpu_present(cpu, true);
numa_store_cpu_info(cpu);
}
}
--
1.7.12.4
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next prev parent reply other threads:[~2019-06-28 11:17 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-28 11:13 [PATCH RFC 0/3] Support CPU hotplug for ARM64 Xiongfeng Wang
2019-06-28 11:13 ` [PATCH RFC 1/3] ACPI / scan: evaluate _STA for processors declared via ASL Device statement Xiongfeng Wang
2019-06-28 11:13 ` Xiongfeng Wang [this message]
2019-06-28 11:13 ` [PATCH RFC 3/3] arm64: Add CPU hotplug support Xiongfeng Wang
2019-06-29 2:07 ` [PATCH RFC 0/3] Support CPU hotplug for ARM64 Xiongfeng Wang
2019-07-04 3:00 ` Jia He
2019-07-04 3:26 ` Xiongfeng Wang
2019-07-04 5:55 ` Jia He
2019-07-04 6:04 ` Jia He
2019-07-04 6:17 ` Xiongfeng Wang
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