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Wed, 17 Jul 2019 13:58:29 +0800 Message-ID: <1563343109.29169.19.camel@mtksdaap41> Subject: Re: [PATCH v4, 22/33] drm/mediatek: add background color input select function for ovl/ovl_2l From: CK Hu To: Date: Wed, 17 Jul 2019 13:58:29 +0800 In-Reply-To: <1562625253-29254-23-git-send-email-yongqiang.niu@mediatek.com> References: <1562625253-29254-1-git-send-email-yongqiang.niu@mediatek.com> <1562625253-29254-23-git-send-email-yongqiang.niu@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: AA45BD5AFD08249059BE630450E0D8590C726157CC07B85B922BBAE9C01B21812000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190716_225842_438484_262B07CF X-CRM114-Status: GOOD ( 17.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Philipp Zabel , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-mediatek@lists.infradead.org, Daniel Vetter , Matthias Brugger , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Yongqiang: On Tue, 2019-07-09 at 06:34 +0800, yongqiang.niu@mediatek.com wrote: > From: Yongqiang Niu > > This patch add background color input select function for ovl/ovl_2l > > ovl include 4 DRAM layer and 1 background color layer > ovl_2l include 4 DRAM layer and 1 background color layer > DRAM layer frame buffer data from render hardware, GPU for example. > backgournd color layer is embed in ovl/ovl_2l, we can only set > it color, but not support DRAM frame buffer. > > for ovl0->ovl0_2l direct link usecase, > we need set ovl0_2l background color intput select from ovl0 > if render send DRAM buffer layer number <=4, all these layer read > by ovl. > layer0 is at the bottom of all layers. > layer3 is at the top of all layers. > if render send DRAM buffer layer numbfer >=4 && <=6 > ovl0 read layer0~3 > ovl0_2l read layer4~5 > layer5 is at the top ot all these layers. > > the decision of how to setting ovl0/ovl0_2l read these layer data > is controlled in mtk crtc, which will be another patch > Reviewed-by: CK Hu > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > index a0ab760..8ca4965 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > @@ -27,6 +27,8 @@ > #define DISP_REG_OVL_EN 0x000c > #define DISP_REG_OVL_RST 0x0014 > #define DISP_REG_OVL_ROI_SIZE 0x0020 > +#define DISP_REG_OVL_DATAPATH_CON 0x0024 > +#define OVL_BGCLR_SEL_IN BIT(2) > #define DISP_REG_OVL_ROI_BGCLR 0x0028 > #define DISP_REG_OVL_SRC_CON 0x002c > #define DISP_REG_OVL_CON(n) (0x0030 + 0x20 * (n)) > @@ -245,6 +247,24 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, > mtk_ovl_layer_on(comp, idx); > } > > +static void mtk_ovl_bgclr_in_on(struct mtk_ddp_comp *comp) > +{ > + unsigned int reg; > + > + reg = readl(comp->regs + DISP_REG_OVL_DATAPATH_CON); > + reg = reg | OVL_BGCLR_SEL_IN; > + writel(reg, comp->regs + DISP_REG_OVL_DATAPATH_CON); > +} > + > +static void mtk_ovl_bgclr_in_off(struct mtk_ddp_comp *comp) > +{ > + unsigned int reg; > + > + reg = readl(comp->regs + DISP_REG_OVL_DATAPATH_CON); > + reg = reg & ~OVL_BGCLR_SEL_IN; > + writel(reg, comp->regs + DISP_REG_OVL_DATAPATH_CON); > +} > + > static const struct mtk_ddp_comp_funcs mtk_disp_ovl_funcs = { > .config = mtk_ovl_config, > .start = mtk_ovl_start, > @@ -255,6 +275,8 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, > .layer_on = mtk_ovl_layer_on, > .layer_off = mtk_ovl_layer_off, > .layer_config = mtk_ovl_layer_config, > + .bgclr_in_on = mtk_ovl_bgclr_in_on, > + .bgclr_in_off = mtk_ovl_bgclr_in_off, > }; > > static int mtk_disp_ovl_bind(struct device *dev, struct device *master, _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel