From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Nicolas Boichat <drinkcat@chromium.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh@kernel.org>
Cc: James Liao <jamesjj.liao@mediatek.com>,
Weiyi Lu <weiyi.lu@mediatek.com>,
srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org,
Fan Chen <fan.chen@mediatek.com>,
linux-mediatek@lists.infradead.org,
Yong Wu <yong.wu@mediatek.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 03/13] soc: mediatek: Refactor polling timeout and documentation
Date: Wed, 28 Aug 2019 17:11:36 +0800 [thread overview]
Message-ID: <1566983506-26598-4-git-send-email-weiyi.lu@mediatek.com> (raw)
In-Reply-To: <1566983506-26598-1-git-send-email-weiyi.lu@mediatek.com>
Use USEC_PER_SEC to indicate the polling timeout directly.
And add documentation of scp_domain_data.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
---
drivers/soc/mediatek/mtk-scpsys.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
index 503222d..e97fc0e 100644
--- a/drivers/soc/mediatek/mtk-scpsys.c
+++ b/drivers/soc/mediatek/mtk-scpsys.c
@@ -21,7 +21,7 @@
#include <dt-bindings/power/mt8173-power.h>
#define MTK_POLL_DELAY_US 10
-#define MTK_POLL_TIMEOUT (jiffies_to_usecs(HZ))
+#define MTK_POLL_TIMEOUT USEC_PER_SEC
#define MTK_SCPD_ACTIVE_WAKEUP BIT(0)
#define MTK_SCPD_FWAIT_SRAM BIT(1)
@@ -108,6 +108,17 @@ enum clk_id {
#define MAX_CLKS 3
+/**
+ * struct scp_domain_data - scp domain data for power on/off flow
+ * @name: The domain name.
+ * @sta_mask: The mask for power on/off status bit.
+ * @ctl_offs: The offset for main power control register.
+ * @sram_pdn_bits: The mask for sram power control bits.
+ * @sram_pdn_ack_bits: The mask for sram power control acked bits.
+ * @bus_prot_mask: The mask for single step bus protection.
+ * @clk_id: The basic clocks required by this power domain.
+ * @caps: The flag for active wake-up action.
+ */
struct scp_domain_data {
const char *name;
u32 sta_mask;
--
1.8.1.1.dirty
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next prev parent reply other threads:[~2019-08-28 9:15 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-28 9:11 [PATCH v7 00/13] Mediatek MT8183 scpsys support Weiyi Lu
2019-08-28 9:11 ` [PATCH v7 01/13] dt-bindings: mediatek: Add property to mt8183 smi-common Weiyi Lu
2019-08-28 9:11 ` [PATCH v7 02/13] dt-bindings: soc: Add MT8183 power dt-bindings Weiyi Lu
2019-08-28 9:39 ` Matthias Brugger
2019-10-08 1:25 ` Weiyi Lu
2019-08-28 9:11 ` Weiyi Lu [this message]
2019-08-28 9:43 ` [PATCH v7 03/13] soc: mediatek: Refactor polling timeout and documentation Matthias Brugger
2019-08-28 9:11 ` [PATCH v7 04/13] soc: mediatek: Refactor regulator control Weiyi Lu
2019-08-28 9:44 ` Matthias Brugger
2019-08-28 9:11 ` [PATCH v7 05/13] soc: mediatek: Refactor clock control Weiyi Lu
2019-08-28 9:46 ` Matthias Brugger
2019-08-28 9:11 ` [PATCH v7 06/13] soc: mediatek: Refactor sram control Weiyi Lu
2019-08-28 10:22 ` Matthias Brugger
2019-08-28 9:11 ` [PATCH v7 07/13] soc: mediatek: Refactor bus protection control Weiyi Lu
2019-08-28 10:28 ` Matthias Brugger
2019-08-28 9:11 ` [PATCH v7 08/13] soc: mediatek: Add basic_clk_id to scp_power_data Weiyi Lu
2019-08-28 9:11 ` [PATCH v7 09/13] soc: mediatek: Add multiple step bus protection control Weiyi Lu
2019-08-28 9:11 ` [PATCH v7 10/13] soc: mediatek: Add subsys clock control for bus protection Weiyi Lu
2019-08-28 9:11 ` [PATCH v7 11/13] soc: mediatek: Add extra sram control Weiyi Lu
2019-08-28 9:11 ` [PATCH v7 12/13] soc: mediatek: Add MT8183 scpsys support Weiyi Lu
2019-08-28 9:11 ` [PATCH v7 13/13] arm64: dts: Add power controller device node of MT8183 Weiyi Lu
2019-08-29 5:15 ` CK Hu
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