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From: Amit Daniel Kachhap <amit.kachhap@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Mark Rutland <mark.rutland@arm.com>,
	Kees Cook <keescook@chromium.org>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Kristina Martsenko <kristina.martsenko@arm.com>,
	Mark Brown <broonie@kernel.org>,
	James Morse <james.morse@arm.com>,
	Amit Daniel Kachhap <amit.kachhap@arm.com>,
	Vincenzo Frascino <Vincenzo.Frascino@arm.com>,
	Will Deacon <will@kernel.org>, Dave Martin <Dave.Martin@arm.com>
Subject: [PATCH v2 3/4] arm64: cpufeature: Modify address authentication cpufeature to exact
Date: Tue, 14 Apr 2020 11:01:53 +0530	[thread overview]
Message-ID: <1586842314-19527-4-git-send-email-amit.kachhap@arm.com> (raw)
In-Reply-To: <1586842314-19527-1-git-send-email-amit.kachhap@arm.com>

This patch modifies the address authentication cpufeature type to EXACT
from earlier LOWER_SAFE as the different configurations added for Armv8.6
enhanced PAC have different behaviour and there is no tunable to enable the
lower safe versions. The safe value is set as 0.

After this change, if there is any variation in configurations in secondary
cpus from boot cpu then those cpus are marked tainted. The KVM guests may
completely disable address authentication if there is any such variations
detected.

Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
---
 arch/arm64/kernel/cpufeature.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 08795025409c..599b03df2f93 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -154,9 +154,9 @@ static const struct arm64_ftr_bits ftr_id_aa64isar1[] = {
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_FCMA_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_JSCVT_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
-		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_API_SHIFT, 4, 0),
+		       FTR_STRICT, FTR_EXACT, ID_AA64ISAR1_API_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
-		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_APA_SHIFT, 4, 0),
+		       FTR_STRICT, FTR_EXACT, ID_AA64ISAR1_APA_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_DPB_SHIFT, 4, 0),
 	ARM64_FTR_END,
 };
-- 
2.17.1


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  parent reply	other threads:[~2020-04-14  5:33 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-14  5:31 [PATCH v2 0/4] arm64: add Armv8.6 pointer authentication Amit Daniel Kachhap
2020-04-14  5:31 ` [PATCH v2 1/4] arm64: cpufeature: Extract meta-capability scope from list Amit Daniel Kachhap
2020-05-06 15:00   ` Catalin Marinas
2020-05-06 16:14     ` Suzuki K Poulose
2020-05-07 15:27       ` Amit Kachhap
2020-04-14  5:31 ` [PATCH v2 2/4] arm64: ptrauth: add pointer authentication Armv8.6 enhanced feature Amit Daniel Kachhap
2020-05-06 16:31   ` Catalin Marinas
2020-05-07 15:28     ` Amit Kachhap
2020-05-12 17:12       ` Catalin Marinas
2020-04-14  5:31 ` Amit Daniel Kachhap [this message]
2020-05-06 17:13   ` [PATCH v2 3/4] arm64: cpufeature: Modify address authentication cpufeature to exact Catalin Marinas
2020-05-08 16:21     ` Amit Kachhap
2020-05-12 17:33       ` Catalin Marinas
2020-05-13 15:42         ` Amit Kachhap
2020-05-20 13:20           ` Suzuki K Poulose
2020-05-21  8:09             ` Amit Kachhap
2020-05-21  9:00               ` Suzuki K Poulose
2020-04-14  5:31 ` [PATCH v2 4/4] arm64: kprobe: disable probe of fault prone ptrauth instruction Amit Daniel Kachhap

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