From: Amit Daniel Kachhap <amit.kachhap@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Kees Cook <keescook@chromium.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Kristina Martsenko <kristina.martsenko@arm.com>,
Mark Brown <broonie@kernel.org>,
James Morse <james.morse@arm.com>,
Amit Daniel Kachhap <amit.kachhap@arm.com>,
Vincenzo Frascino <Vincenzo.Frascino@arm.com>,
Will Deacon <will@kernel.org>, Dave Martin <Dave.Martin@arm.com>
Subject: [PATCH v2 4/4] arm64: kprobe: disable probe of fault prone ptrauth instruction
Date: Tue, 14 Apr 2020 11:01:54 +0530 [thread overview]
Message-ID: <1586842314-19527-5-git-send-email-amit.kachhap@arm.com> (raw)
In-Reply-To: <1586842314-19527-1-git-send-email-amit.kachhap@arm.com>
This patch disables the probing of authenticate ptrauth instruction
(AUTIASP) which falls under the hint instructions region. This is done
to disallow probe of authenticate instruction in the kernel which may
lead to ptrauth faults with the addition of Armv8.6 enhanced ptrauth
features.
The corresponding append pac ptrauth instruction (PACIASP) is not disabled
and they can still be probed.
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
---
This patch may need some changes with Mark Brown's work on whitelisting
of hint instructions [1].
[1]: http://lists.infradead.org/pipermail/linux-arm-kernel/2020-March/720280.html
arch/arm64/include/asm/insn.h | 13 +++++++------
arch/arm64/kernel/insn.c | 1 +
arch/arm64/kernel/probes/decode-insn.c | 2 +-
3 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
index bb313dde58a4..2e01db04c885 100644
--- a/arch/arm64/include/asm/insn.h
+++ b/arch/arm64/include/asm/insn.h
@@ -40,12 +40,13 @@ enum aarch64_insn_encoding_class {
};
enum aarch64_insn_hint_op {
- AARCH64_INSN_HINT_NOP = 0x0 << 5,
- AARCH64_INSN_HINT_YIELD = 0x1 << 5,
- AARCH64_INSN_HINT_WFE = 0x2 << 5,
- AARCH64_INSN_HINT_WFI = 0x3 << 5,
- AARCH64_INSN_HINT_SEV = 0x4 << 5,
- AARCH64_INSN_HINT_SEVL = 0x5 << 5,
+ AARCH64_INSN_HINT_NOP = 0x0 << 5,
+ AARCH64_INSN_HINT_YIELD = 0x1 << 5,
+ AARCH64_INSN_HINT_WFE = 0x2 << 5,
+ AARCH64_INSN_HINT_WFI = 0x3 << 5,
+ AARCH64_INSN_HINT_SEV = 0x4 << 5,
+ AARCH64_INSN_HINT_SEVL = 0x5 << 5,
+ AARCH64_INSN_HINT_AUTIASP = (0x3 << 8) | (0x5 << 5),
};
enum aarch64_insn_imm_type {
diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
index 4a9e773a177f..87f7c8a46b31 100644
--- a/arch/arm64/kernel/insn.c
+++ b/arch/arm64/kernel/insn.c
@@ -63,6 +63,7 @@ bool __kprobes aarch64_insn_is_nop(u32 insn)
case AARCH64_INSN_HINT_WFI:
case AARCH64_INSN_HINT_SEV:
case AARCH64_INSN_HINT_SEVL:
+ case AARCH64_INSN_HINT_AUTIASP:
return false;
default:
return true;
diff --git a/arch/arm64/kernel/probes/decode-insn.c b/arch/arm64/kernel/probes/decode-insn.c
index b78fac9e546c..a7caf84a9baa 100644
--- a/arch/arm64/kernel/probes/decode-insn.c
+++ b/arch/arm64/kernel/probes/decode-insn.c
@@ -42,7 +42,7 @@ static bool __kprobes aarch64_insn_is_steppable(u32 insn)
!= AARCH64_INSN_SPCLREG_DAIF;
/*
- * The HINT instruction is is problematic when single-stepping,
+ * The HINT instruction is problematic when single-stepping,
* except for the NOP case.
*/
if (aarch64_insn_is_hint(insn))
--
2.17.1
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prev parent reply other threads:[~2020-04-14 5:33 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-14 5:31 [PATCH v2 0/4] arm64: add Armv8.6 pointer authentication Amit Daniel Kachhap
2020-04-14 5:31 ` [PATCH v2 1/4] arm64: cpufeature: Extract meta-capability scope from list Amit Daniel Kachhap
2020-05-06 15:00 ` Catalin Marinas
2020-05-06 16:14 ` Suzuki K Poulose
2020-05-07 15:27 ` Amit Kachhap
2020-04-14 5:31 ` [PATCH v2 2/4] arm64: ptrauth: add pointer authentication Armv8.6 enhanced feature Amit Daniel Kachhap
2020-05-06 16:31 ` Catalin Marinas
2020-05-07 15:28 ` Amit Kachhap
2020-05-12 17:12 ` Catalin Marinas
2020-04-14 5:31 ` [PATCH v2 3/4] arm64: cpufeature: Modify address authentication cpufeature to exact Amit Daniel Kachhap
2020-05-06 17:13 ` Catalin Marinas
2020-05-08 16:21 ` Amit Kachhap
2020-05-12 17:33 ` Catalin Marinas
2020-05-13 15:42 ` Amit Kachhap
2020-05-20 13:20 ` Suzuki K Poulose
2020-05-21 8:09 ` Amit Kachhap
2020-05-21 9:00 ` Suzuki K Poulose
2020-04-14 5:31 ` Amit Daniel Kachhap [this message]
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