From: John Garry <john.garry@huawei.com>
To: <peterz@infradead.org>, <mingo@redhat.com>, <acme@kernel.org>,
<mark.rutland@arm.com>, <alexander.shishkin@linux.intel.com>,
<jolsa@redhat.com>, <namhyung@kernel.org>, <will@kernel.org>
Cc: irogers@google.com, ak@linux.intel.com,
linux-kernel@vger.kernel.org, John Garry <john.garry@huawei.com>,
qiangqing.zhang@nxp.com, linuxarm@huawei.com,
zhangshaokun@hisilicon.com, robin.murphy@arm.com,
linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH v2 05/13] perf vendor events arm64: Add Architected events smmuv3-pmcg.json
Date: Fri, 17 Apr 2020 18:41:16 +0800 [thread overview]
Message-ID: <1587120084-18990-6-git-send-email-john.garry@huawei.com> (raw)
In-Reply-To: <1587120084-18990-1-git-send-email-john.garry@huawei.com>
Add JSON for Architected events from [0], Section 10.3 .
[0] https://static.docs.arm.com/ihi0070/a/IHI_0070A_SMMUv3.pdf
Signed-off-by: John Garry <john.garry@huawei.com>
---
tools/perf/pmu-events/arch/arm64/smmuv3-pmcg.json | 58 +++++++++++++++++++++++
tools/perf/pmu-events/jevents.c | 2 +
2 files changed, 60 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/arm64/smmuv3-pmcg.json
diff --git a/tools/perf/pmu-events/arch/arm64/smmuv3-pmcg.json b/tools/perf/pmu-events/arch/arm64/smmuv3-pmcg.json
new file mode 100644
index 000000000000..7ceb2b4372fa
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/smmuv3-pmcg.json
@@ -0,0 +1,58 @@
+[
+ {
+ "PublicDescription": "Clock cycles",
+ "EventCode": "0x00",
+ "EventName": "smmuv3_pmcg.CYCLES",
+ "BriefDescription": "Clock cycles"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "Transaction",
+ "EventCode": "0x01",
+ "EventName": "smmuv3_pmcg.TRANSACTION",
+ "BriefDescription": "Transaction"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "TLB miss caused by incomingtransaction or (ATS or non-ATS) translation request",
+ "EventCode": "0x02",
+ "EventName": "smmuv3_pmcg.TLB_MISS",
+ "BriefDescription": "TLB miss caused by incomingtransaction or (ATS or non-ATS) translation request"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "Configuration cache miss caused by transaction or(ATS or non-ATS)translation request",
+ "EventCode": "0x03",
+ "EventName": "smmuv3_pmcg.CONFIG_CACHE_MISS",
+ "BriefDescription": "Configuration cache miss caused by transaction or(ATS or non-ATS)translation request"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "Translation table walk access",
+ "EventCode": "0x04",
+ "EventName": "smmuv3_pmcg.TRANS_TABLE_WALK_ACCESS",
+ "BriefDescription": "Translation table walk access"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "Configuration structure access",
+ "EventCode": "0x05",
+ "EventName": "smmuv3_pmcg.CONFIG_STRUCT_ACCESS",
+ "BriefDescription": "Configuration structure access"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "PCIe ATS Translation Request received",
+ "EventCode": "0x06",
+ "EventName": "smmuv3_pmcg.PCIE_ATS_TRANS_RQ",
+ "BriefDescription": "PCIe ATS Translation Request received"
+ "Unit": "smmuv3_pmcg",
+ },
+ {
+ "PublicDescription": "PCIe ATS Translated Transaction passed through SMMU",
+ "EventCode": "0x07",
+ "EventName": "smmuv3_pmcg.PCIE_ATS_TRANS_PASSED",
+ "BriefDescription": "PCIe ATS Translated Transaction passed through SMMU"
+ "Unit": "smmuv3_pmcg",
+ }
+]
diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
index acb6b77bddc0..76a84ec2ffc8 100644
--- a/tools/perf/pmu-events/jevents.c
+++ b/tools/perf/pmu-events/jevents.c
@@ -256,6 +256,8 @@ static struct map {
{ "hisi_sccl,ddrc", "hisi_sccl,ddrc" },
{ "hisi_sccl,hha", "hisi_sccl,hha" },
{ "hisi_sccl,l3c", "hisi_sccl,l3c" },
+ /* it's not realistic to keep adding these, we need something more scalable ... */
+ { "smmuv3_pmcg", "smmuv3_pmcg" },
{ "L3PMC", "amd_l3" },
{}
};
--
2.16.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-04-17 10:45 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-17 10:41 [RFC PATCH v2 00/13] perf pmu-events: Support event aliasing for system PMUs John Garry
2020-04-17 10:41 ` [RFC PATCH v2 01/13] perf parse-events: Fix comparison of evsel and leader pmu name John Garry
2020-04-27 8:16 ` Jiri Olsa
2020-04-27 9:03 ` John Garry
2020-04-17 10:41 ` [RFC PATCH v2 02/13] perf jevents: Add support for an extra directory level John Garry
2020-04-17 10:41 ` [RFC PATCH v2 03/13] perf jevents: Add support for system events tables John Garry
2020-04-17 10:41 ` [RFC PATCH v2 04/13] perf vendor events arm64: Relocate hip08 events John Garry
2020-04-17 10:41 ` John Garry [this message]
2020-04-17 15:13 ` [RFC PATCH v2 05/13] perf vendor events arm64: Add Architected events smmuv3-pmcg.json Ian Rogers
2020-04-17 16:14 ` John Garry
2020-04-17 10:41 ` [RFC PATCH v2 06/13] perf vendor events arm64: Add hip08 SMMUv3 PMCG events John Garry
2020-04-17 10:41 ` [RFC PATCH v2 07/13] perf pmu: Add pmu_id() John Garry
2020-04-22 11:41 ` Jiri Olsa
2020-04-22 11:54 ` John Garry
2020-04-17 10:41 ` [RFC PATCH v2 08/13] perf pmu: Add pmu_add_sys_aliases() John Garry
2020-04-17 10:41 ` [RFC PATCH v2 09/13] perf vendor events: Add JSON metrics for imx8mm DDR Perf John Garry
2020-04-20 4:17 ` Joakim Zhang
2020-04-20 10:50 ` John Garry
2020-04-20 11:25 ` Joakim Zhang
2020-04-20 14:20 ` John Garry
2020-04-21 2:40 ` Joakim Zhang
2020-04-21 12:28 ` John Garry
2020-04-27 8:09 ` John Garry
2020-04-17 10:41 ` [RFC PATCH v2 10/13] perf metricgroup: Split up metricgroup__add_metric() John Garry
2020-04-22 11:44 ` Jiri Olsa
2020-04-22 12:00 ` John Garry
2020-04-17 10:41 ` [RFC PATCH v2 11/13] perf metricgroup: Split up metricgroup__print() John Garry
2020-04-17 10:41 ` [RFC PATCH v2 12/13] perf metricgroup: Support printing metric groups for system PMUs John Garry
2020-04-17 10:41 ` [RFC PATCH v2 13/13] perf metricgroup: Support adding metrics " John Garry
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1587120084-18990-6-git-send-email-john.garry@huawei.com \
--to=john.garry@huawei.com \
--cc=acme@kernel.org \
--cc=ak@linux.intel.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=irogers@google.com \
--cc=jolsa@redhat.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=mark.rutland@arm.com \
--cc=mingo@redhat.com \
--cc=namhyung@kernel.org \
--cc=peterz@infradead.org \
--cc=qiangqing.zhang@nxp.com \
--cc=robin.murphy@arm.com \
--cc=will@kernel.org \
--cc=zhangshaokun@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).