* (no subject)
@ 2020-05-06 6:42 dillon.minfei
2020-05-06 6:42 ` [PATCH 4/4] clk: stm32f4: fix ltdc driver hang as clk set rate failed dillon.minfei
0 siblings, 1 reply; 2+ messages in thread
From: dillon.minfei @ 2020-05-06 6:42 UTC (permalink / raw)
To: mturquette, sboyd, mcoquelin.stm32, alexandre.torgue, sam
Cc: linux-kernel, linux-clk, linux-arm-kernel, linux-stm32
Fix stm32f429's ltdc driver loading hang in ltdc clk enable. set clk_hw to the
wrong offset of clks in stm32f4_rcc_register_pll, should be PLL_SAI
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* [PATCH 4/4] clk: stm32f4: fix ltdc driver hang as clk set rate failed
2020-05-06 6:42 dillon.minfei
@ 2020-05-06 6:42 ` dillon.minfei
0 siblings, 0 replies; 2+ messages in thread
From: dillon.minfei @ 2020-05-06 6:42 UTC (permalink / raw)
To: mturquette, sboyd, mcoquelin.stm32, alexandre.torgue, sam
Cc: linux-kernel, dillon min, linux-clk, linux-arm-kernel,
linux-stm32
From: dillon min <dillon.minfei@gmail.com>
should use PLL_SAI offset of clks , not PLL_VCO_SAI
else can not get clk gate.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
---
drivers/clk/clk-stm32f4.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index 18117ce..bdebe05 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -129,7 +129,8 @@ static const struct stm32f4_gate_data stm32f429_gates[] __initconst = {
{ STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" },
- { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" },
+ { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div",
+ CLK_IGNORE_UNUSED },
};
static const struct stm32f4_gate_data stm32f469_gates[] __initconst = {
@@ -1754,10 +1755,10 @@ static void __init stm32f4_rcc_init(struct device_node *np)
stm32f4_rcc_register_pll("vco_in", &data->pll_data[0],
&stm32f4_clk_lock);
- clks[PLL_VCO_I2S] = stm32f4_rcc_register_pll("vco_in",
+ clks[PLL_I2S] = stm32f4_rcc_register_pll("vco_in",
&data->pll_data[1], &stm32f4_clk_lock);
- clks[PLL_VCO_SAI] = stm32f4_rcc_register_pll("vco_in",
+ clks[PLL_SAI] = stm32f4_rcc_register_pll("vco_in",
&data->pll_data[2], &stm32f4_clk_lock);
for (n = 0; n < MAX_POST_DIV; n++) {
--
2.7.4
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