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Tue, 14 Jul 2020 01:44:03 -0800 Received: from MTKMBS31N2.mediatek.inc (172.27.4.87) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 14 Jul 2020 02:33:58 -0700 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 14 Jul 2020 17:33:55 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 14 Jul 2020 17:33:54 +0800 Message-ID: <1594719186.16172.35.camel@mhfsdcap03> Subject: Re: [PATCH 11/21] iommu/mediatek: Add power-domain operation From: Yong Wu To: Pi-Hsun Shih Date: Tue, 14 Jul 2020 17:33:06 +0800 In-Reply-To: References: <20200711064846.16007-1-yong.wu@mediatek.com> <20200711064846.16007-12-yong.wu@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: 4A868CC5672C9E09033785D03A34B39C2AB230B1DC2A9B4BD748D338AF6B73A92000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200714_054406_778911_F66099DB X-CRM114-Status: GOOD ( 19.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Youlin Pei =?UTF-8?Q?=28=E8=A3=B4=E5=8F=8B=E6=9E=97=29?= , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Nicolas Boichat , cui.zhang@mediatek.com, srv_heupstream@mediatek.com, chao.hao@mediatek.com, Robin Murphy , Joerg Roedel , open list , Evan Green , Tomasz Figa , iommu@lists.linux-foundation.org, Rob Herring , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , ming-fan.chen@mediatek.com, anan.sun@mediatek.com, Will Deacon , "moderated list:ARM/Mediatek SoC support" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 2020-07-13 at 15:03 +0800, Pi-Hsun Shih wrote: > On Sat, Jul 11, 2020 at 2:51 PM Yong Wu wrote: > > > > In the previous SoC, the M4U HW is in the EMI power domain which is > > always on. the latest M4U is in the display power domain which may be > > turned on/off, thus we have to add pm_runtime interface for it. > > > > we should enable its power before M4U hw initial. and disable it after HW > > initialize. > > > > When the engine work, the engine always enable the power and clocks for > > smi-larb/smi-common, then the M4U's power will always be powered on > > automatically via the device link with smi-common. > > > > Note: we don't enable the M4U power in iommu_map/unmap for tlb flush. > > If its power already is on, of course it is ok. if the power is off, > > the main tlb will be reset while M4U power on, thus the tlb flush while > > m4u power off is unnecessary, just skip it. > > > > Signed-off-by: Yong Wu > > --- > > drivers/iommu/mtk_iommu.c | 54 ++++++++++++++++++++++++++++++++++----- > > 1 file changed, 47 insertions(+), 7 deletions(-) > > ... > > for_each_m4u(data) { > > + /* skip tlb flush when pm is not active */ > > + if (pm_runtime_enabled(data->dev) && > > + !pm_runtime_active(data->dev)) > > + continue; > > + > > pm_runtime_active(dev) == false implies dev->power.disable_depth == 0, > which implies pm_runtime_enabled(dev) == true, so the > pm_runtime_enabled(data->dev) can be omitted here. Yes. Thanks. Will fix in next version. > > > spin_lock_irqsave(&data->tlb_lock, flags); > > writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0, > > data->base + data->plat_data->inv_sel_reg); > > ... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel