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Mon, 20 Jul 2020 22:00:43 -0800 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 20 Jul 2020 23:00:42 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 21 Jul 2020 14:00:41 +0800 Received: from [172.21.77.33] (172.21.77.33) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 21 Jul 2020 14:00:41 +0800 Message-ID: <1595311242.5599.3.camel@mtkswgap22> Subject: Re: [PATCH v8 6/7] arm64: dts: add dts nodes for MT6779 From: Hanks Chen To: Matthias Brugger Date: Tue, 21 Jul 2020 14:00:42 +0800 In-Reply-To: <742eefe1-954b-eb3f-98b7-469833df729a@gmail.com> References: <1594718402-20813-1-git-send-email-hanks.chen@mediatek.com> <1594718402-20813-7-git-send-email-hanks.chen@mediatek.com> <1b335463-b0af-9010-feed-c4b673ebb6c5@gmail.com> <1594872242.11090.8.camel@mtkswgap22> <742eefe1-954b-eb3f-98b7-469833df729a@gmail.com> X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200721_020051_058076_2DF4C1C5 X-CRM114-Status: GOOD ( 25.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, CC Hwang , wsd_upstream@mediatek.com, Stephen Boyd , Andy Teng , Linus Walleij , Sean Wang , Loda Chou , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Rob Herring , linux-mediatek@lists.infradead.org, mtk01761 , Michael Turquette , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 2020-07-20 at 18:13 +0200, Matthias Brugger wrote: > > On 16/07/2020 06:04, Hanks Chen wrote: > > On Tue, 2020-07-14 at 20:14 +0200, Matthias Brugger wrote: > >> > >> On 14/07/2020 11:20, Hanks Chen wrote: > >>> this adds initial MT6779 dts settings for board support, > >>> including cpu, gic, timer, ccf, pinctrl, uart, sysirq...etc. > >>> > >>> Signed-off-by: Hanks Chen > >>> --- > >>> arch/arm64/boot/dts/mediatek/Makefile | 1 + > >>> arch/arm64/boot/dts/mediatek/mt6779-evb.dts | 31 +++ > >>> arch/arm64/boot/dts/mediatek/mt6779.dtsi | 271 ++++++++++++++++++++ > >>> 3 files changed, 303 insertions(+) > >>> create mode 100644 arch/arm64/boot/dts/mediatek/mt6779-evb.dts > >>> create mode 100644 arch/arm64/boot/dts/mediatek/mt6779.dtsi > >>> > >> [...] > >>> + > >>> + uart0: serial@11002000 { > >>> + compatible = "mediatek,mt6779-uart", > >>> + "mediatek,mt6577-uart"; > >>> + reg = <0 0x11002000 0 0x400>; > >>> + interrupts = ; > >>> + clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_UART0>; > >>> + clock-names = "baud", "bus"; > >>> + status = "disabled"; > >>> + }; > >>> + > >>> + uart1: serial@11003000 { > >>> + compatible = "mediatek,mt6779-uart", > >>> + "mediatek,mt6577-uart"; > >>> + reg = <0 0x11003000 0 0x400>; > >>> + interrupts = ; > >>> + clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_UART1>; > >>> + clock-names = "baud", "bus"; > >>> + status = "disabled"; > >>> + }; > >>> + > >>> + uart2: serial@11004000 { > >>> + compatible = "mediatek,mt6779-uart", > >>> + "mediatek,mt6577-uart"; > >>> + reg = <0 0x11004000 0 0x400>; > >>> + interrupts = ; > >>> + clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_UART2>; > >>> + clock-names = "baud", "bus"; > >>> + status = "disabled"; > >>> + }; > >> > >> Devicetree describes the HW we have. As far as I know, we have 4 UARTs on > >> MT6779. So we should list them all here. > >> > > > > Actually, We have only 3 UARTs HW on MT6779, but have 4 UART clk in > > header file of clk. > > Correct, I got confused by the four clocks. > With that clarified I'm fine with the patch and will take it as soon as the > clock driver patch is accepted. > > Regards, > Matthias > Got it, I send a new serial to fix the redundant UART clk https://lkml.org/lkml/2020/7/21/45 Thanks Hanks Chen > > CLK_INFRA_UART3 is a dummy clk interface, it has no effect on the > > operation of the read/write instruction. > > > > If you think it is not good, I can remove it in the header file of clk. > > > > Thanks > > > >> Regards, > >> Matthias > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel