From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FEEFC433E0 for ; Tue, 4 Aug 2020 14:16:37 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5502022B40 for ; Tue, 4 Aug 2020 14:16:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="jZF7j+Er" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5502022B40 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Owner; bh=rZ4FbetdCwXe4PZNtk2CWUIbWsOKQC9czf5HyNnmQw0=; b=jZF7j+Er+7vI0jaCFMXW95bqvh voKfc/j0/i2coGcVoa8fmQNYOk3w7DLGdIxyIxc5fZcZUE6uGII93IJ7bKEosL4NKBgd5JSx5UgvK bMuSATcvrqrYG7BwAun2v6rziWuYECYMPCPTPHqRXvuQ6tWz4galUKb5mjThdKBQRJTf8n/TjX6FI 0qqZfZlRlqgBYVFhsSRr1AKz4hlwOf677HM06MsBg/Hs8bBjyr2ccl9MtZzRxa5+6PZFD0DCRH8Mf jCxVe2moqb7V0SjwQMaKjaqnx+QOkWhETGY0h7zTYeoDeDV5UAtIL0DzJBP8vtvWSAzKGOvTnyWMF xjZsp4pQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k2xig-00034O-GJ; Tue, 04 Aug 2020 14:15:10 +0000 Received: from alexa-out.qualcomm.com ([129.46.98.28]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k2xid-00033O-L6 for linux-arm-kernel@lists.infradead.org; Tue, 04 Aug 2020 14:15:08 +0000 Received: from ironmsg07-lv.qualcomm.com (HELO ironmsg07-lv.qulacomm.com) ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 04 Aug 2020 07:15:05 -0700 Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by ironmsg07-lv.qulacomm.com with ESMTP/TLS/AES256-SHA; 04 Aug 2020 07:15:04 -0700 Received: from gkohli-linux.qualcomm.com ([10.204.78.26]) by ironmsg01-blr.qualcomm.com with ESMTP; 04 Aug 2020 19:44:50 +0530 Received: by gkohli-linux.qualcomm.com (Postfix, from userid 427023) id 5DC1C486A; Tue, 4 Aug 2020 19:44:47 +0530 (IST) From: Gaurav Kohli To: will@kernel.org, linux-arm-kernel@lists.infradead.org, maz@kernel.org Subject: [PATCH] arm64: Skip apply SSBS call for non SSBS system Date: Tue, 4 Aug 2020 19:44:42 +0530 Message-Id: <1596550484-11029-1-git-send-email-gkohli@codeaurora.org> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200804_101507_860248_60E4BFD9 X-CRM114-Status: UNSURE ( 8.67 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gaurav Kohli , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, neeraju@codeaurora.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In a system where no cpu's implement SSBS, for them no need to set pstate. This might help to save few cpu cycles during context switch. Signed-off-by: Gaurav Kohli diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 6089638..79f80f1 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -477,6 +477,13 @@ static void ssbs_thread_switch(struct task_struct *next) struct pt_regs *regs = task_pt_regs(next); /* + * For Targets which don't have SSBS support, they + * can return from here. + */ + if (!IS_ENABLED(CONFIG_ARM64_SSBD)) + return; + + /* * Nothing to do for kernel threads, but 'regs' may be junk * (e.g. idle task) so check the flags and bail early. */ -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel