From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 669EAC433EF for ; Tue, 8 Feb 2022 07:10:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:To:Subject:CC:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=tfGtfsRzGt9cUH3AJFVoRDvRrqANzdgKagn/f7qTjXI=; b=PWpH6He4wn7p9cuSIYToN5YgKf FnmGUxQ7RNkXixAA2vkUKxMzfdPhpkOOrF9t7H/BQZzF317EUSa92hFnqWFeSfJJYolJGPyaNZea4 5NZgmb5dCe3W72B9wcjABTXzykM2FikQn4X9WpC6aRaFltg8/qSDO695ytTFDl5DfFPgxUvaRTa7G WQn3bYxo9dANcSmV+BPUrRlReURGohmq2CNKkPGB57GHOhKdqXQ1aG/h9pYEjKhN5BWAhviXl6P7n IO6It3hVkXB+AcYTAIQbU31sQKlsLmGz9vEP/ObpfPxVBeRXbjbFRe/JrgM/iFwrxvGRL72/MZg89 17T5KmBA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nHKcg-00CjNA-Su; Tue, 08 Feb 2022 07:09:11 +0000 Received: from szxga08-in.huawei.com ([45.249.212.255]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nHKcc-00CjLy-G1 for linux-arm-kernel@lists.infradead.org; Tue, 08 Feb 2022 07:09:08 +0000 Received: from canpemm500009.china.huawei.com (unknown [172.30.72.57]) by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4JtDXX4dRZz1FD31; Tue, 8 Feb 2022 15:04:44 +0800 (CST) Received: from [10.67.102.169] (10.67.102.169) by canpemm500009.china.huawei.com (7.192.105.203) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.21; Tue, 8 Feb 2022 15:08:55 +0800 CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v3 4/8] hisi_ptt: Add tune function support for HiSilicon PCIe Tune and Trace device To: Jonathan Cameron , Yicong Yang References: <20220124131118.17887-1-yangyicong@hisilicon.com> <20220124131118.17887-5-yangyicong@hisilicon.com> <20220207114911.0000127e@Huawei.com> From: Yicong Yang Message-ID: <15ebb616-bc5a-f589-a435-c8322202661a@huawei.com> Date: Tue, 8 Feb 2022 15:08:55 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.5.1 MIME-Version: 1.0 In-Reply-To: <20220207114911.0000127e@Huawei.com> X-Originating-IP: [10.67.102.169] X-ClientProxiedBy: dggems702-chm.china.huawei.com (10.3.19.179) To canpemm500009.china.huawei.com (7.192.105.203) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220207_230906_984131_1BD134C2 X-CRM114-Status: GOOD ( 18.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2022/2/7 19:49, Jonathan Cameron wrote: > On Mon, 24 Jan 2022 21:11:14 +0800 > Yicong Yang wrote: > >> Add tune function for the HiSilicon Tune and Trace device. The interface >> of tune is exposed through sysfs attributes of PTT PMU device. >> >> Signed-off-by: Yicong Yang > > A few trivial things inline, but looks good in general to me. > With those tidied up > Reviewed-by: Jonathan Cameron > Thanks for the comments. > >> --- >> drivers/hwtracing/ptt/hisi_ptt.c | 154 +++++++++++++++++++++++++++++++ >> drivers/hwtracing/ptt/hisi_ptt.h | 19 ++++ >> 2 files changed, 173 insertions(+) >> >> diff --git a/drivers/hwtracing/ptt/hisi_ptt.c b/drivers/hwtracing/ptt/hisi_ptt.c >> index 2994354e690b..b11e702eb506 100644 >> --- a/drivers/hwtracing/ptt/hisi_ptt.c >> +++ b/drivers/hwtracing/ptt/hisi_ptt.c >> @@ -21,6 +21,159 @@ >> >> #include "hisi_ptt.h" >> >> +static int hisi_ptt_wait_tuning_finish(struct hisi_ptt *hisi_ptt) >> +{ >> + u32 val; >> + >> + return readl_poll_timeout(hisi_ptt->iobase + HISI_PTT_TUNING_INT_STAT, >> + val, !(val & HISI_PTT_TUNING_INT_STAT_MASK), >> + HISI_PTT_WAIT_POLL_INTERVAL_US, >> + HISI_PTT_WAIT_TIMEOUT_US); >> +} >> + >> +static int hisi_ptt_tune_data_get(struct hisi_ptt *hisi_ptt, >> + u32 event, u16 *data) >> +{ >> + u32 reg; >> + >> + reg = readl(hisi_ptt->iobase + HISI_PTT_TUNING_CTRL); >> + reg &= ~(HISI_PTT_TUNING_CTRL_CODE | HISI_PTT_TUNING_CTRL_SUB); >> + reg |= FIELD_PREP(HISI_PTT_TUNING_CTRL_CODE | HISI_PTT_TUNING_CTRL_SUB, >> + event); >> + writel(reg, hisi_ptt->iobase + HISI_PTT_TUNING_CTRL); >> + >> + /* Write all 1 to indicates it's the read process */ >> + writel(~0UL, hisi_ptt->iobase + HISI_PTT_TUNING_DATA); > > Just to check, this is includes the bits above the DATA_VAL_MASK? > Fine if so, just seems odd to define a field but then write > parts of the register that aren't part of that field. > yes. The valid data field is [0,15]. But all 1 is used here to indicate that it's a read process rather than a write process. >> + >> + if (hisi_ptt_wait_tuning_finish(hisi_ptt)) >> + return -ETIMEDOUT; >> + >> + reg = readl(hisi_ptt->iobase + HISI_PTT_TUNING_DATA); >> + reg &= HISI_PTT_TUNING_DATA_VAL_MASK; >> + *data = (u16)reg; > > As below, prefer a FIELD_GET() for this. > sure. will use field ops here and below. Thanks. >> + >> + return 0; >> +} >> + >> +static int hisi_ptt_tune_data_set(struct hisi_ptt *hisi_ptt, >> + u32 event, u16 data) >> +{ >> + u32 reg; >> + >> + reg = readl(hisi_ptt->iobase + HISI_PTT_TUNING_CTRL); >> + reg &= ~(HISI_PTT_TUNING_CTRL_CODE | HISI_PTT_TUNING_CTRL_SUB); >> + reg |= FIELD_PREP(HISI_PTT_TUNING_CTRL_CODE | HISI_PTT_TUNING_CTRL_SUB, >> + event); >> + writel(reg, hisi_ptt->iobase + HISI_PTT_TUNING_CTRL); >> + >> + reg = data; > Given you defined HISI_PTT_TUNING_DATA_VAL_MASK why not use it here > > writel(FIELD_PREP(..), ...)? > >> + writel(reg, hisi_ptt->iobase + HISI_PTT_TUNING_DATA); >> + >> + if (hisi_ptt_wait_tuning_finish(hisi_ptt)) >> + return -ETIMEDOUT; >> + >> + return 0; >> +} >> + > > > . > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel