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Sun, 11 Oct 2020 19:25:02 -0800 Received: from MTKMBS02N2.mediatek.inc (172.21.101.101) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 11 Oct 2020 20:25:00 -0700 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 12 Oct 2020 11:24:57 +0800 Received: from [172.21.77.33] (172.21.77.33) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 12 Oct 2020 11:24:57 +0800 Message-ID: <1602473098.26774.5.camel@mtkswgap22> Subject: Re: [PATCH v7 2/2] soc: mediatek: add mt6779 devapc driver From: Neal Liu To: Matthias Brugger Date: Mon, 12 Oct 2020 11:24:58 +0800 In-Reply-To: <0ece983b-2e55-cf06-aca8-02a014fce090@gmail.com> References: <1598497593-15781-1-git-send-email-neal.liu@mediatek.com> <1598497593-15781-3-git-send-email-neal.liu@mediatek.com> <1602124514.28301.17.camel@mtkswgap22> <1602149965.8784.6.camel@mtkswgap22> <0ece983b-2e55-cf06-aca8-02a014fce090@gmail.com> X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-TM-SNTS-SMTP: A57CB5B722B96A24B6BC4E4DA5FC2FE3FA559752A9CF0861603F1BE94AA214DC2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201011_232510_255973_7B048641 X-CRM114-Status: GOOD ( 25.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chun-Kuang Hu , wsd_upstream@mediatek.com, devicetree@vger.kernel.org, lkml , Rob Herring , linux-mediatek@lists.infradead.org, Neal Liu , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 2020-10-09 at 14:34 +0200, Matthias Brugger wrote: > > On 08/10/2020 11:39, Neal Liu wrote: > > On Thu, 2020-10-08 at 10:45 +0200, Matthias Brugger wrote: > >> > >> On 08/10/2020 04:35, Neal Liu wrote: > >>> On Wed, 2020-10-07 at 12:44 +0200, Matthias Brugger wrote: > >>>> > >>>> On 27/08/2020 05:06, Neal Liu wrote: > [...] > > >>>>> +static int mtk_devapc_probe(struct platform_device *pdev) > >>>>> +{ > >>>>> + struct device_node *node = pdev->dev.of_node; > >>>>> + struct mtk_devapc_context *ctx; > >>>>> + u32 devapc_irq; > >>>>> + int ret; > >>>>> + > >>>>> + if (IS_ERR(node)) > >>>>> + return -ENODEV; > >>>>> + > >>>>> + ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); > >>>>> + if (!ctx) > >>>>> + return -ENOMEM; > >>>>> + > >>>>> + ctx->data = of_device_get_match_data(&pdev->dev); > >>>>> + ctx->dev = &pdev->dev; > >>>>> + > >>>>> + ctx->infra_base = of_iomap(node, 0); > >>>> > >>>> Does this mean the device is part of the infracfg block? > >>>> I wasn't able to find any information about it. > >>> > >>> I'm not sure why you would ask infracfg block. devapc is parts of our > >>> SoC infra, it's different with infracfg. > >>> > >> > >> I'm asking because I want to understand the HW better. I'm not able to find any > >> information in the datasheets. I want to avoid a situation as we had with the > >> MMSYS where a clock driver was submitted first and later on we realized that > >> MMSYS is much more then that and we had to work hard to get the driver right. > >> > >> Now it's happening with SCPSYS, where a driver with the scpsys compatible was > >> send years ago. But SCPSYS is much more then the driver submitted. In this case > >> we opted to write a new driver, but moving from one driver to another one is > >> painfull and full of problems. For that I want to make sure we fully understand > >> Device APC (by the way, what does APC stands for?). Is it a totally independent > >> HW block or is it part of a subsystem, like for example SCP? > >> > >> Regards, > >> Matthias > > > > It's a totally independent HW block instead of a subsystem. > > I think it's more simple than MMSYS or SCPSYS. But if you would like to > > understand more about this HW, we could find another way/channel to > > introduce it. > > > > If it's a independent HW block, then we are good. No further information needed > by me. I'd just advise to rename the infra_base to something like base, as it > made me confuse. > > Thanks! > Matthias You can imagine that infra_base means infra devapc base address for MT6779. In 5G platforms, MediaTek infrastructure would separate into multiple parts, so does devapc HW. And devapc would be like: infra_base, peri_base, peri2_base, ... Thanks. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel