From: Sumit Garg <sumit.garg@linaro.org>
To: maz@kernel.org, catalin.marinas@arm.com, will@kernel.org
Cc: mark.rutland@arm.com, Sumit Garg <sumit.garg@linaro.org>,
daniel.thompson@linaro.org, jason@lakedaemon.net,
kgdb-bugreport@lists.sourceforge.net, ito-yuichi@fujitsu.com,
dianders@chromium.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, jason.wessel@windriver.com,
tglx@linutronix.de, msys.mizuma@gmail.com,
julien.thierry.kdev@gmail.com
Subject: [PATCH v5 3/5] arm64: smp: Allocate and setup IPI as NMI
Date: Wed, 14 Oct 2020 16:42:09 +0530 [thread overview]
Message-ID: <1602673931-28782-4-git-send-email-sumit.garg@linaro.org> (raw)
In-Reply-To: <1602673931-28782-1-git-send-email-sumit.garg@linaro.org>
Allocate an unused IPI that can be turned as NMI using ipi_nmi framework.
Also, invoke corresponding NMI setup/teardown APIs.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
---
arch/arm64/kernel/smp.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 82e75fc..129ebfb 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -43,6 +43,7 @@
#include <asm/daifflags.h>
#include <asm/kvm_mmu.h>
#include <asm/mmu_context.h>
+#include <asm/nmi.h>
#include <asm/numa.h>
#include <asm/processor.h>
#include <asm/smp_plat.h>
@@ -962,6 +963,8 @@ static void ipi_setup(int cpu)
for (i = 0; i < nr_ipi; i++)
enable_percpu_irq(ipi_irq_base + i, 0);
+
+ ipi_nmi_setup(cpu);
}
#ifdef CONFIG_HOTPLUG_CPU
@@ -974,6 +977,8 @@ static void ipi_teardown(int cpu)
for (i = 0; i < nr_ipi; i++)
disable_percpu_irq(ipi_irq_base + i);
+
+ ipi_nmi_teardown(cpu);
}
#endif
@@ -995,6 +1000,9 @@ void __init set_smp_ipi_range(int ipi_base, int n)
irq_set_status_flags(ipi_base + i, IRQ_HIDDEN);
}
+ if (n > nr_ipi)
+ set_smp_ipi_nmi(ipi_base + nr_ipi);
+
ipi_irq_base = ipi_base;
/* Setup the boot CPU immediately */
--
2.7.4
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next prev parent reply other threads:[~2020-10-14 11:14 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-14 11:12 [PATCH v5 0/5] arm64: Add framework to turn an IPI as NMI Sumit Garg
2020-10-14 11:12 ` [PATCH v5 1/5] arm64: Add framework to turn " Sumit Garg
2020-10-15 1:15 ` Masayoshi Mizuma
2020-10-19 11:37 ` Marc Zyngier
2020-10-20 6:43 ` Sumit Garg
2020-10-20 10:08 ` Marc Zyngier
2020-10-20 11:22 ` Sumit Garg
2020-10-20 12:25 ` Daniel Thompson
2020-10-20 12:32 ` Marc Zyngier
2020-10-21 5:22 ` Sumit Garg
2020-10-21 10:27 ` Marc Zyngier
2020-10-22 11:52 ` Sumit Garg
2020-10-19 11:56 ` Marc Zyngier
2020-10-20 7:07 ` Sumit Garg
2020-10-14 11:12 ` [PATCH v5 2/5] irqchip/gic-v3: Enable support for SGIs to act as NMIs Sumit Garg
2020-10-15 1:16 ` Masayoshi Mizuma
2020-10-19 12:07 ` Marc Zyngier
2020-10-20 7:24 ` Sumit Garg
2020-10-14 11:12 ` Sumit Garg [this message]
2020-10-15 1:16 ` [PATCH v5 3/5] arm64: smp: Allocate and setup IPI as NMI Masayoshi Mizuma
2020-10-19 11:59 ` Marc Zyngier
2020-10-20 7:16 ` Sumit Garg
2020-10-14 11:12 ` [PATCH v5 4/5] arm64: kgdb: Round up cpus using " Sumit Garg
2020-10-19 12:15 ` Marc Zyngier
2020-10-20 8:51 ` Sumit Garg
2020-10-14 11:12 ` [PATCH v5 5/5] arm64: ipi_nmi: Add support for NMI backtrace Sumit Garg
2020-10-15 1:17 ` Masayoshi Mizuma
2020-10-19 12:20 ` Marc Zyngier
2020-10-20 9:13 ` Sumit Garg
2020-10-21 10:32 ` Marc Zyngier
2020-10-21 11:28 ` Sumit Garg
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