From: Pingfan Liu <kernelfans@gmail.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Julien Thierry <julien.thierry@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Pingfan Liu <kernelfans@gmail.com>, Marc Zyngier <maz@kernel.org>,
Will Deacon <will@kernel.org>
Subject: [PATCH 2/3] arm64/irq-gic-v3: make gic_handle_irq() cope with enter_from_kernel_mode()
Date: Mon, 14 Dec 2020 10:25:51 +0800 [thread overview]
Message-ID: <1607912752-12481-2-git-send-email-kernelfans@gmail.com> (raw)
In-Reply-To: <1607912752-12481-1-git-send-email-kernelfans@gmail.com>
The call to irq_enter() originated from gic_handle_irq() has already
redundant, since arm64 has enter_from_kernel_mode() akin to
irqenter_entry().
So eliminate the call in __handle_domain_irq(). And accordingly
supplement irq_enter_rcu().
Signed-off-by: Pingfan Liu <kernelfans@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Julien Thierry <julien.thierry@arm.com>
To: linux-arm-kernel@lists.infradead.org
---
arch/arm64/Kconfig | 1 +
drivers/irqchip/irq-gic-v3.c | 6 +++++-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index a6b5b7ef40ae..84ffed84158f 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -201,6 +201,7 @@ config ARM64
select SWIOTLB
select SYSCTL_EXCEPTION_TRACE
select THREAD_INFO_IN_TASK
+ select ARCH_HAS_IRQENTRY_ENTER
help
ARM 64-bit (AArch64) Linux support.
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 16fecc0febe8..a66e0b04e42b 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -654,14 +654,17 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs
return;
}
+ irq_enter_rcu();
if (gic_prio_masking_enabled()) {
gic_pmr_mask_irqs();
gic_arch_enable_irqs();
}
/* Check for special IDs first */
- if ((irqnr >= 1020 && irqnr <= 1023))
+ if ((irqnr >= 1020 && irqnr <= 1023)) {
+ irq_exit_rcu();
return;
+ }
if (static_branch_likely(&supports_deactivate_key))
gic_write_eoir(irqnr);
@@ -672,6 +675,7 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs
WARN_ONCE(true, "Unexpected interrupt received!\n");
gic_deactivate_unhandled(irqnr);
}
+ irq_exit_rcu();
}
static u32 gic_get_pribits(void)
--
2.29.2
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next prev parent reply other threads:[~2020-12-14 2:29 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-08 13:14 [PATCH] arm64/irq: use NMI to send stop IPI Pingfan Liu
2020-12-08 14:04 ` Marc Zyngier
2020-12-14 2:20 ` Pingfan Liu
2020-12-14 2:25 ` [PATCH 1/3] kernel/irq: __handle_domain_irq() makes irq_enter/exit arch optional Pingfan Liu
2020-12-14 2:25 ` Pingfan Liu [this message]
2020-12-14 2:25 ` [PATCH 3/3] arm64/irq-gic-v3: make reschedule-ipi light weight Pingfan Liu
2020-12-14 9:46 ` [PATCH] arm64/irq: use NMI to send stop IPI Marc Zyngier
2020-12-14 13:04 ` Pingfan Liu
2020-12-14 13:24 ` Marc Zyngier
2020-12-15 5:40 ` Pingfan Liu
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