From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C808C433E0 for ; Tue, 26 Jan 2021 08:55:54 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 098F122573 for ; Tue, 26 Jan 2021 08:55:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 098F122573 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Date:To:From: Subject:Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=hdhNVySpTp9lFjghbY96ENSDN/fx3gQTvXITIEaUwDI=; b=gaEVlyrbVM80ghjcDGwtW1N+1 k/O2hZMDI3pQZh3STdzS1fy3cVBxpqnK8sQKDElxBZ3RPqiR0OxX3bJz2yCw4I/20g4JyFyujZrZB xyjKB57/5w7pyzw9ptHTZai4maKmUt7H+F16reOM5uPYu/mYqT/u/EYLx2b6R4QmZmypGd3znbJxP QnuGbWXk7B3tiA46ZbDwbZOvaWGtYlTGWZgYOjzez3lW+pMaKFhb50MvH7pnrtSdOK18RT81ge6RE Qgu0co9iKq1M0KEMhCdL6Bj+/aoEvRSnH3VB/QX2nGJgVMjJs2oNkCIejAx7ak2R2wgDti7eufRjr YPDapwMmw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l4K70-000722-Id; Tue, 26 Jan 2021 08:54:10 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l4K6w-00070l-VR; Tue, 26 Jan 2021 08:54:08 +0000 X-UUID: f19c70a70a37441c9d6e179125c919d6-20210126 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=04ladyiJRe/ET+NLC+Ueie0MAKsGM3sYbgSIARsb4xc=; b=YSUPBTfbQa76KZzMk95NDS6n2/4nROcdNjMn/ZYrxa6+CQc6FUpg7EuiFrD7MuUVc1A8qnp+O1T1hMAubBKWvnjdFKOSI8RGUgCn32wAyBmqKdR3GSVgR/FLh/oiehv0OMHXeUiJtiXR7iBfIFucTZoZUvBpxNYg5NNNakTSApE=; X-UUID: f19c70a70a37441c9d6e179125c919d6-20210126 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 94517710; Tue, 26 Jan 2021 00:54:03 -0800 Received: from MTKMBS07N2.mediatek.inc (172.21.101.141) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 26 Jan 2021 00:44:01 -0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 26 Jan 2021 16:43:59 +0800 Received: from [172.21.77.4] (172.21.77.4) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 26 Jan 2021 16:43:59 +0800 Message-ID: <1611650639.20687.2.camel@mtksdaap41> Subject: Re: [PATCH 2/3] arm64: dts: mt8173: Separating mtk-vcodec-enc device node From: Tiffany Lin To: Irui Wang Date: Tue, 26 Jan 2021 16:43:59 +0800 In-Reply-To: <20210121061804.26423-2-irui.wang@mediatek.com> References: <20210121061804.26423-1-irui.wang@mediatek.com> <20210121061804.26423-2-irui.wang@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210126_035407_229156_09ADF37A X-CRM114-Status: GOOD ( 16.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew-CT Chen , Maoguang Meng , srv_heupstream@mediatek.com, Alexandre Courbot , Tomasz Figa , Yunfei Dong , Longfei Wang , linux-kernel@vger.kernel.org, Matthias Brugger , devicetree@vger.kernel.org, Rob Herring , linux-mediatek@lists.infradead.org, Hsin-Yi Wang , Hans Verkuil , Mauro Carvalho Chehab , linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 2021-01-21 at 14:18 +0800, Irui Wang wrote: > There are two separate hardware encoder blocks inside MT8173. > Split the current mtk-vcodec-enc node to match the hardware architecture. > > Signed-off-by: Hsin-Yi Wang > Signed-off-by: Maoguang Meng > Signed-off-by: Irui Wang > Acked-by: Tiffany Lin > --- > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 60 ++++++++++++------------ > 1 file changed, 31 insertions(+), 29 deletions(-) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > index 7fa870e4386a..d667b296c512 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > @@ -1459,13 +1459,10 @@ > }; > > vcodec_enc: vcodec@18002000 { > - compatible = "mediatek,mt8173-vcodec-enc"; > - reg = <0 0x18002000 0 0x1000>, /* VENC_SYS */ > - <0 0x19002000 0 0x1000>; /* VENC_LT_SYS */ > - interrupts = , > - ; > - mediatek,larb = <&larb3>, > - <&larb5>; > + compatible = "mediatek,mt8173-vcodec-avc-enc"; > + reg = <0 0x18002000 0 0x1000>; /* VENC_SYS */ > + interrupts = ; > + mediatek,larb = <&larb3>; > iommus = <&iommu M4U_PORT_VENC_RCPU>, > <&iommu M4U_PORT_VENC_REC>, > <&iommu M4U_PORT_VENC_BSDMA>, > @@ -1476,29 +1473,12 @@ > <&iommu M4U_PORT_VENC_REF_LUMA>, > <&iommu M4U_PORT_VENC_REF_CHROMA>, > <&iommu M4U_PORT_VENC_NBM_RDMA>, > - <&iommu M4U_PORT_VENC_NBM_WDMA>, > - <&iommu M4U_PORT_VENC_RCPU_SET2>, > - <&iommu M4U_PORT_VENC_REC_FRM_SET2>, > - <&iommu M4U_PORT_VENC_BSDMA_SET2>, > - <&iommu M4U_PORT_VENC_SV_COMA_SET2>, > - <&iommu M4U_PORT_VENC_RD_COMA_SET2>, > - <&iommu M4U_PORT_VENC_CUR_LUMA_SET2>, > - <&iommu M4U_PORT_VENC_CUR_CHROMA_SET2>, > - <&iommu M4U_PORT_VENC_REF_LUMA_SET2>, > - <&iommu M4U_PORT_VENC_REC_CHROMA_SET2>; > + <&iommu M4U_PORT_VENC_NBM_WDMA>; > mediatek,vpu = <&vpu>; > - clocks = <&topckgen CLK_TOP_VENCPLL_D2>, > - <&topckgen CLK_TOP_VENC_SEL>, > - <&topckgen CLK_TOP_UNIVPLL1_D2>, > - <&topckgen CLK_TOP_VENC_LT_SEL>; > - clock-names = "venc_sel_src", > - "venc_sel", > - "venc_lt_sel_src", > - "venc_lt_sel"; > - assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>, > - <&topckgen CLK_TOP_VENC_LT_SEL>; > - assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>, > - <&topckgen CLK_TOP_VCODECPLL_370P5>; > + clocks = <&topckgen CLK_TOP_VENC_SEL>; > + clock-names = "venc_sel"; > + assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>; > + assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>; > }; > > jpegdec: jpegdec@18004000 { > @@ -1530,5 +1510,27 @@ > <&vencltsys CLK_VENCLT_CKE0>; > clock-names = "apb", "smi"; > }; > + > + vcodec_enc_lt: vcodec@19002000 { > + compatible = "mediatek,mt8173-vcodec-vp8-enc"; > + reg = <0 0x19002000 0 0x1000>; /* VENC_LT_SYS */ > + interrupts = ; > + iommus = <&iommu M4U_PORT_VENC_RCPU_SET2>, > + <&iommu M4U_PORT_VENC_REC_FRM_SET2>, > + <&iommu M4U_PORT_VENC_BSDMA_SET2>, > + <&iommu M4U_PORT_VENC_SV_COMA_SET2>, > + <&iommu M4U_PORT_VENC_RD_COMA_SET2>, > + <&iommu M4U_PORT_VENC_CUR_LUMA_SET2>, > + <&iommu M4U_PORT_VENC_CUR_CHROMA_SET2>, > + <&iommu M4U_PORT_VENC_REF_LUMA_SET2>, > + <&iommu M4U_PORT_VENC_REC_CHROMA_SET2>; > + mediatek,larb = <&larb5>; > + mediatek,vpu = <&vpu>; > + clocks = <&topckgen CLK_TOP_VENC_LT_SEL>; > + clock-names = "venc_lt_sel"; > + assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>; > + assigned-clock-parents = > + <&topckgen CLK_TOP_VCODECPLL_370P5>; > + }; > }; > }; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel