From: Abel Vesa <abel.vesa@nxp.com>
To: Rob Herring <robh@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <kernel@pengutronix.de>,
Lucas Stach <l.stach@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Georgi Djakov <djakov@kernel.org>,
Dong Aisheng <aisheng.dong@nxp.com>, Peng Fan <peng.fan@nxp.com>,
Martin Kepplinger <martink@posteo.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-clk@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>, Abel Vesa <abel.vesa@nxp.com>
Subject: [RFC 15/19] arm64: dts: imx8mq: Add all pl301 nodes
Date: Fri, 19 Feb 2021 18:00:12 +0200 [thread overview]
Message-ID: <1613750416-11901-16-git-send-email-abel.vesa@nxp.com> (raw)
In-Reply-To: <1613750416-11901-1-git-send-email-abel.vesa@nxp.com>
Add all the pl301s found on i.MX8MQ, according to the bus diagram.
Each pl301 has its own clock, icc id and opp table. They are probed
by the imx-bus driver.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 180 ++++++++++++++++++++++
1 file changed, 180 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index e30e948648e9..5f9ffa465d6c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1447,5 +1447,185 @@ ddr-pmu@3d800000 {
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ pl301_main: pl301@0 {
+ compatible = "fsl,imx8m-nic";
+ clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
+ operating-points-v2 = <&pl301_main_opp_table>;
+ #interconnect-cells = <0>;
+ fsl,icc-id = <IMX8MQ_ICN_MAIN>;
+
+ pl301_main_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-25M {
+ opp-hz = /bits/ 64 <25000000>;
+ };
+ opp-133M {
+ opp-hz = /bits/ 64 <133333333>;
+ };
+ opp-333M {
+ opp-hz = /bits/ 64 <333333333>;
+ };
+ };
+ };
+
+ pl301_enet: pl301@1 {
+ compatible = "fsl,imx8m-nic";
+ clocks = <&clk IMX8MQ_CLK_ENET_AXI>;
+ operating-points-v2 = <&pl301_enet_opp_table>;
+ #interconnect-cells = <0>;
+ fsl,icc-id = <IMX8MQ_ICN_ENET>;
+
+ pl301_enet_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-25M {
+ opp-hz = /bits/ 64 <25000000>;
+ };
+ opp-266M {
+ opp-hz = /bits/ 64 <266666666>;
+ };
+ };
+ };
+
+ pl301_gpu: pl301@2 {
+ compatible = "fsl,imx8m-nic";
+ clocks = <&clk IMX8MQ_CLK_GPU_AXI>;
+ operating-points-v2 = <&pl301_gpu_opp_table>;
+ #interconnect-cells = <0>;
+ fsl,icc-id = <IMX8MQ_ICN_GPU>;
+
+ pl301_gpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-25M {
+ opp-hz = /bits/ 64 <25000000>;
+ };
+ opp-800M {
+ opp-hz = /bits/ 64 <800000000>;
+ };
+ };
+ };
+
+ pl301_dc: pl301@3 {
+ compatible = "fsl,imx8m-nic";
+ clocks = <&clk IMX8MQ_CLK_DISP_AXI>;
+ operating-points-v2 = <&pl301_dc_opp_table>;
+ #interconnect-cells = <0>;
+ fsl,icc-id = <IMX8MQ_ICN_DCSS>;
+
+ pl301_dc_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-25M {
+ opp-hz = /bits/ 64 <25000000>;
+ };
+ opp-800M {
+ opp-hz = /bits/ 64 <800000000>;
+ };
+ };
+ };
+
+ /* PL301_DISPLAY (IPs other than DCSS, inside SUPERMIX) */
+ pl301_display: pl301@4 {
+ compatible = "fsl,imx8m-nic";
+ /* FIXME: don't know which clock yet */
+ clocks = <&clk IMX8MQ_CLK_DUMMY>;
+ operating-points-v2 = <&pl301_display_opp_table>;
+ #interconnect-cells = <0>;
+ fsl,icc-id = <IMX8MQ_ICN_DISPLAY>;
+
+ pl301_display_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-25M {
+ opp-hz = /bits/ 64 <25000000>;
+ };
+ opp-333M {
+ opp-hz = /bits/ 64 <333333333>;
+ };
+ };
+ };
+
+ pl301_audio: pl301@5 {
+ compatible = "fsl,imx8m-nic";
+ clocks = <&clk IMX8MQ_CLK_AUDIO_AHB>;
+ operating-points-v2 = <&pl301_audio_opp_table>;
+ #interconnect-cells = <0>;
+ fsl,icc-id = <IMX8MQ_ICN_AUDIO>;
+
+ pl301_audio_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-25M {
+ opp-hz = /bits/ 64 <25000000>;
+ };
+ opp-500M {
+ opp-hz = /bits/ 64 <500000000>;
+ };
+ };
+ };
+
+ pl301_video: pl301@6 {
+ compatible = "fsl,imx8m-nic";
+ clocks = <&clk IMX8MQ_CLK_VPU_BUS>;
+ operating-points-v2 = <&pl301_video_opp_table>;
+ #interconnect-cells = <0>;
+ fsl,icc-id = <IMX8MQ_ICN_VIDEO>;
+
+ pl301_video_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-25M {
+ opp-hz = /bits/ 64 <25000000>;
+ };
+ opp-500M {
+ opp-hz = /bits/ 64 <500000000>;
+ };
+ };
+ };
+
+ pl301_usb: pl301@7 {
+ compatible = "fsl,imx8m-nic";
+ clocks = <&clk IMX8MQ_CLK_USB_BUS>;
+ operating-points-v2 = <&pl301_usb_opp_table>;
+ #interconnect-cells = <0>;
+ fsl,icc-id = <IMX8MQ_ICN_USB>;
+
+ pl301_usb_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-25M {
+ opp-hz = /bits/ 64 <25000000>;
+ };
+ opp-128M {
+ opp-hz = /bits/ 64 <128000000>;
+ };
+ opp-500M {
+ opp-hz = /bits/ 64 <500000000>;
+ };
+ };
+ };
+
+ pl301_wakeup: pl301@8 {
+ compatible = "fsl,imx8m-nic";
+ /* FIXME: don't know which clock yet */
+ clocks = <&clk IMX8MQ_CLK_DUMMY>;
+ operating-points-v2 = <&pl301_wakeup_opp_table>;
+ #interconnect-cells = <0>;
+ fsl,icc-id = <IMX8MQ_ICN_WAKEUP>;
+
+ pl301_wakeup_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-25M {
+ opp-hz = /bits/ 64 <25000000>;
+ };
+ opp-133M {
+ opp-hz = /bits/ 64 <133333333>;
+ };
+ };
+ };
};
};
--
2.29.2
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next prev parent reply other threads:[~2021-02-19 16:04 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-19 15:59 [RFC 00/19] Rework support for i.MX8MQ interconnect with devfreq Abel Vesa
2021-02-19 15:59 ` [RFC 01/19] clk: imx8mq: Replace critical with ignore_unused flag for dram_apb clock Abel Vesa
2021-02-19 15:59 ` [RFC 02/19] dt-bindings: interconnect: imx8mq: Add missing pl301 and SAI ids Abel Vesa
2021-03-05 23:10 ` Rob Herring
2021-02-19 16:00 ` [RFC 03/19] devfreq: imx-bus: Switch governor to powersave Abel Vesa
2021-02-26 14:46 ` Chanwoo Choi
2021-02-19 16:00 ` [RFC 04/19] devfreq: imx-bus: Decouple imx-bus from icc made Abel Vesa
2021-02-26 16:52 ` Chanwoo Choi
2021-02-19 16:00 ` [RFC 05/19] devfreq: imx8m-ddrc: Change governor to powersave Abel Vesa
2021-02-26 14:47 ` Chanwoo Choi
2021-03-09 13:40 ` Dong Aisheng
2021-02-19 16:00 ` [RFC 06/19] devfreq: imx8m-ddrc: Use the opps acquired from EL3 Abel Vesa
2021-02-26 15:12 ` Chanwoo Choi
2021-02-19 16:00 ` [RFC 07/19] devfreq: imx8m-ddrc: Add late system sleep PM ops Abel Vesa
2021-02-26 15:23 ` Chanwoo Choi
2021-02-19 16:00 ` [RFC 08/19] interconnect: imx: Switch from imx_icc_node_adj_desc to fsl, icc-id node assignment Abel Vesa
2021-02-19 16:00 ` [RFC 09/19] interconnect: imx8: Remove the imx_icc_node_adj_desc Abel Vesa
2021-02-19 16:00 ` [RFC 10/19] interconnect: imx8mq: Add the pl301_per_m and pl301_wakeup nodes and subnodes Abel Vesa
2021-02-19 16:00 ` [RFC 11/19] interconnect: imx8mq: Add of_match_table Abel Vesa
2021-02-19 16:00 ` [RFC 12/19] interconnect: imx: Add imx_icc_get_bw and imx_icc_aggregate functions Abel Vesa
2021-02-19 16:00 ` [RFC 13/19] arm64: dts: imx8mq: Add fsl,icc-id property to ddrc node Abel Vesa
2021-02-19 16:00 ` [RFC 14/19] arm64: dts: imx8mq: Add fsl,icc-id to noc node Abel Vesa
2021-02-19 16:29 ` Abel Vesa
2021-02-19 16:00 ` Abel Vesa [this message]
2021-02-21 15:47 ` [RFC 15/19] arm64: dts: imx8mq: Add all pl301 nodes Krzysztof Kozlowski
2021-02-19 16:00 ` [RFC 16/19] arm64: dts: imx8mq: Add the interconnect node Abel Vesa
2021-02-19 16:00 ` [RFC 17/19] arm64: dts: imx8mq: Add interconnect properties to icc consumer nodes Abel Vesa
2021-02-19 16:00 ` [RFC 18/19] net: ethernet: fec_main: Add interconnect support Abel Vesa
2021-02-19 16:00 ` [RFC 19/19] mmc: sdhci-esdhc-imx: " Abel Vesa
2021-02-22 16:03 ` [RFC 00/19] Rework support for i.MX8MQ interconnect with devfreq Martin Kepplinger
2021-02-23 17:20 ` Abel Vesa
2021-02-25 12:13 ` Martin Kepplinger
2021-03-09 11:43 ` Abel Vesa
2021-03-24 8:03 ` Martin Kepplinger
2021-02-26 23:04 ` Chanwoo Choi
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