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Mon, 12 Apr 2021 01:46:26 -0700 Received: from mtkcas07.mediatek.inc (172.21.101.84) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 12 Apr 2021 16:46:23 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 12 Apr 2021 16:46:23 +0800 Message-ID: <1618217183.16010.4.camel@mtksdaap41> Subject: Re: [PATCH v1] drm/mediatek: adjust rdma fifo threshold calculate formula From: CK Hu To: Yongqiang Niu CC: Chun-Kuang Hu , Rob Herring , Mark Rutland , , "David Airlie" , , , , , Matthias Brugger , Date: Mon, 12 Apr 2021 16:46:23 +0800 In-Reply-To: <1618212332-3547-2-git-send-email-yongqiang.niu@mediatek.com> References: <1618212332-3547-1-git-send-email-yongqiang.niu@mediatek.com> <1618212332-3547-2-git-send-email-yongqiang.niu@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: B93D2EA023810F2AB99CA9F7808B7137FCA922C9F707457EE34B03921C380BE52000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210412_014850_772617_E9830BD0 X-CRM114-Status: GOOD ( 19.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Yongqiang: On Mon, 2021-04-12 at 15:25 +0800, Yongqiang Niu wrote: > the orginal formula will caused rdma fifo threshold config overflow > > Signed-off-by: Yongqiang Niu > --- > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > index 728aaad..8c9371b 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > @@ -167,7 +167,7 @@ void mtk_rdma_config(struct device *dev, unsigned int width, > * output threshold to 6 microseconds with 7/6 overhead to > * account for blanking, and with a pixel depth of 4 bytes: > */ > - threshold = width * height * vrefresh * 4 * 7 / 1000000; > + threshold = rdma_fifo_size * 7 / 10; It's better to set threshold by width and height, but it seems that no one could come out a solution for all SoC. I could just accept this solution, but I need some addition comment for this solution. How do you decide 7/10? In the future, another may need to modify this value and he need to know why you use 7/10. If you just choose it at random, just tell us that you just randomly choose it. Regards, CK > reg = RDMA_FIFO_UNDERFLOW_EN | > RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) | > RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel