Re: [PATCH 7/8] membarrier: Remove arm (32) support for SYNC_CORE

Russell King (Oracle)
2021-06-16T10:36:42Z

On Wed, Jun 16, 2021 at 12:20:06PM +0200, Peter Zijlstra wrote:
> On Wed, Jun 16, 2021 at 12:16:27PM +0200, Peter Zijlstra wrote:
> > On Tue, Jun 15, 2021 at 08:21:12PM -0700, Andy Lutomirski wrote:
> > > On arm32, the only way to safely flush icache from usermode is to call
> > > cacheflush(2). This also handles any required pipeline flushes, so
> > > membarrier's SYNC_CORE feature is useless on arm. Remove it.
> >
> > So SYNC_CORE is there to help an architecture that needs to do something
> > per CPU. If I$ invalidation is broadcast and I$ invalidation also
> > triggers the flush of any uarch caches derived from it (if there are
> > any).
>
> Incomplete sentence there: + then we don't need SYNC_CORE.
>
> > Now arm_syscall() NR(cacheflush) seems to do flush_icache_user_range(),
> > which, if I read things right, end up in arch/arm/mm/*.S, but that
> > doesn't consider cache_ops_need_broadcast().
> >
> > Will suggests that perhaps ARM 11MPCore might need this due to their I$
> > flush maybe not being broadcast

If it leaves other cores with incoherent I cache, then that's already
a problem for SMP cores, since there could be no guarantee that the
modifications made by one core will be visible to some other core that
ends up running that code - and there is little option for userspace to
work around that except by pinning the thread making the modifications
and subsequently executing the code to a core.

The same is also true of flush_icache_range() - which is used when
loading a kernel module. In the case Will is referring to, these alias
to the same code.

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