From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB89AC433FE for ; Thu, 4 Nov 2021 08:36:22 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9A452611CB for ; Thu, 4 Nov 2021 08:36:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 9A452611CB Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linuxfoundation.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:In-Reply-To: Date:From:Cc:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=KR8+5Qs+mQ0ST5fVhR4VFb8nsf+tScBaWc3fb5axm+g=; b=TQTZ3N+Ok31mAv zCT4hW4w1vY9sVqWiBg/Oe0otnSoK4UtcREEICBzQ14Xa1lV6ar2NDV4lHagIgQjbRJH7IWxY0GGH 9Hnf4BWZb3nLYUTKRDc8awFITvyiPDv9kTQx5hm16ZptHFlmA/JW2lkNKY86TUgtURCeGFdCfQlo8 QlZJRYP8AhVvUHa83ZshM950l9iTmuTlItzs70+cr+Qoi6yvb4gpraAR0PEfmIJlNExcmvx/XJcNW g0EcTDKoxa07UtCQe4eurYT5GaRdIGfMyfg07CjzSEDu3QXoS4v9KCp5Szirc8KG6Jk2d3GRsVc+3 muPIiLkphMOqLLybQmVg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1miYD1-008IvO-As; Thu, 04 Nov 2021 08:34:55 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1miYCu-008It2-Ja; Thu, 04 Nov 2021 08:34:50 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id A4A58611CB; Thu, 4 Nov 2021 08:34:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1636014888; bh=GEv5xuuTebeMrb1u1aiDnK4knfQaEdc4Qr1xwX/fGyo=; h=Subject:To:Cc:From:Date:In-Reply-To:From; b=wwJZHAwACtd1UwthM2Pl6mRD0qqhlu9xvAPxbN9NaDPzEkLHpjGGvRbPNg2iKlSqQ Jo/ceOEuuJu3gxX+Y+RADGhh5PMKusbzzVNNc0h4hVVK2ri0YXj1eV5ik5dq3rHp8l mYlTG6mBp+3mbgBTLj8NgEAwa/YDxcLniF2t+DZc= Subject: Patch "mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS" has been added to the 4.9-stable tree To: arnd@arndb.de, benh@kernel.crashing.org, bp@suse.de, f.fainelli@gmail.com, gregkh@linuxfoundation.org, hpa@zytor.com, kirill.shutemov@linux.intel.com, linux-arm-kernel@lists.infradead.org, linux-mips@linux-mips.org, linux-mm@kvack.org, linux-snps-arc@lists.infradead.org, linux@armlinux.org.uk, linuxppc-dev@lists.ozlabs.org, luto@amacapital.net, minchan@kernel.org, mingo@kernel.org, mingo@redhat.com, mpe@ellerman.id.au, ngupta@vflare.org, paulus@samba.org, peterz@infradead.org, ralf@linux-mips.org, rppt@linux.ibm.com, sashal@kernel.org, sergey.senozhatsky.work@gmail.com, stefan@agner.ch, tglx@linutronix.de, torvalds@linux-foundation.org, tsbogend@alpha.franken.de, vgupta@synopsys.com, x86@kernel.org Cc: From: Date: Thu, 04 Nov 2021 09:34:37 +0100 In-Reply-To: <20211103205714.374801-2-f.fainelli@gmail.com> Message-ID: <16360148778012@kroah.com> MIME-Version: 1.0 X-stable: commit X-Patchwork-Hint: ignore X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211104_013448_744056_8587063F X-CRM114-Status: GOOD ( 16.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is a note to let you know that I've just added the patch titled mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS to the 4.9-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: mm-zsmalloc-prepare-to-variable-max_physmem_bits.patch and it can be found in the queue-4.9 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >From foo@baz Thu Nov 4 09:33:49 AM CET 2021 From: Florian Fainelli Date: Wed, 3 Nov 2021 13:57:13 -0700 Subject: mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS To: linux-kernel@vger.kernel.org Cc: stable@vger.kernel.org, Greg Kroah-Hartman , Sasha Levin , "Kirill A. Shutemov" , Nitin Gupta , Minchan Kim , Andy Lutomirski , Borislav Petkov , Linus Torvalds , Peter Zijlstra , Sergey Senozhatsky , Thomas Gleixner , linux-mm@kvack.org, Ingo Molnar , Florian Fainelli , Vineet Gupta , Russell King , Ralf Baechle , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)), Arnd Bergmann , Thomas Bogendoerfer , Mike Rapoport , Stefan Agner , linux-snps-arc@lists.infradead.org (open list:SYNOPSYS ARC ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:ARM PORT), linux-mips@linux-mips.org (open list:MIPS), linuxppc-dev@lists.ozlabs.org (open list:LINUX FOR POWERPC (32-BIT AND 64-BIT)), linux-arch@vger.kernel.org (open list:GENERIC INCLUDE/ASM HEADER FILES) Message-ID: <20211103205714.374801-2-f.fainelli@gmail.com> From: "Kirill A. Shutemov" commit 02390b87a9459937cdb299e6b34ff33992512ec7 upstream With boot-time switching between paging mode we will have variable MAX_PHYSMEM_BITS. Let's use the maximum variable possible for CONFIG_X86_5LEVEL=y configuration to define zsmalloc data structures. The patch introduces MAX_POSSIBLE_PHYSMEM_BITS to cover such case. It also suits well to handle PAE special case. Signed-off-by: Kirill A. Shutemov Reviewed-by: Nitin Gupta Acked-by: Minchan Kim Cc: Andy Lutomirski Cc: Borislav Petkov Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Sergey Senozhatsky Cc: Thomas Gleixner Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/20180214111656.88514-3-kirill.shutemov@linux.intel.com Signed-off-by: Ingo Molnar [florian: drop arch/x86/include/asm/pgtable_64_types.h changes since there is no CONFIG_X86_5LEVEL] Signed-off-by: Florian Fainelli Signed-off-by: Greg Kroah-Hartman --- arch/x86/include/asm/pgtable-3level_types.h | 1 + mm/zsmalloc.c | 13 +++++++------ 2 files changed, 8 insertions(+), 6 deletions(-) --- a/arch/x86/include/asm/pgtable-3level_types.h +++ b/arch/x86/include/asm/pgtable-3level_types.h @@ -42,5 +42,6 @@ typedef union { */ #define PTRS_PER_PTE 512 +#define MAX_POSSIBLE_PHYSMEM_BITS 36 #endif /* _ASM_X86_PGTABLE_3LEVEL_DEFS_H */ --- a/mm/zsmalloc.c +++ b/mm/zsmalloc.c @@ -83,18 +83,19 @@ * This is made more complicated by various memory models and PAE. */ -#ifndef MAX_PHYSMEM_BITS -#ifdef CONFIG_HIGHMEM64G -#define MAX_PHYSMEM_BITS 36 -#else /* !CONFIG_HIGHMEM64G */ +#ifndef MAX_POSSIBLE_PHYSMEM_BITS +#ifdef MAX_PHYSMEM_BITS +#define MAX_POSSIBLE_PHYSMEM_BITS MAX_PHYSMEM_BITS +#else /* * If this definition of MAX_PHYSMEM_BITS is used, OBJ_INDEX_BITS will just * be PAGE_SHIFT */ -#define MAX_PHYSMEM_BITS BITS_PER_LONG +#define MAX_POSSIBLE_PHYSMEM_BITS BITS_PER_LONG #endif #endif -#define _PFN_BITS (MAX_PHYSMEM_BITS - PAGE_SHIFT) + +#define _PFN_BITS (MAX_POSSIBLE_PHYSMEM_BITS - PAGE_SHIFT) /* * Memory for allocating for handle keeps object position by Patches currently in stable-queue which might be from f.fainelli@gmail.com are queue-4.9/mm-zsmalloc-prepare-to-variable-max_physmem_bits.patch queue-4.9/arch-pgtable-define-max_possible_physmem_bits-where-needed.patch _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel