From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 44075C433FE for ; Tue, 25 Jan 2022 14:22:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date:Subject:Cc:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=qKFlSTBV5h1DaVP+lNf+kxntWPIeMLwkbrosue/jaDU=; b=dJLn+2R+D0n2ud qZHBM6aWlx0eE6K/VcrLrQMPR7fTdl0LIpTwC3BYlkVOSC4yI2rbBLj9qIUDz1HF2AAsTQpQ8plrX ngXtwAr4LqxwZaPUb7c3zyI6HZBunIJqWyhuGfdZXs3opHOCXlx08kYF+DMkXF6YcG+n0kdwQ1F8X RhIPjnmmo5OTDpJPKDz975gJSAZege/j1G6gkdbZDHZATHfXUIVoEQNTo/4pzhyGRm6lgh2BxN46k +3CVTB3BSrMG0GiWuyNGC2C7cpHckm+rnUC/ROR11c6j5XP+OaZ/EDWO+jCMktCKagZ9u9iyCLIJD I5LSIc3c4ZDitwahvKkQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nCMgv-0085cd-AY; Tue, 25 Jan 2022 14:21:01 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nCMgq-0085bp-RM for linux-arm-kernel@lists.infradead.org; Tue, 25 Jan 2022 14:20:58 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2B8B1D6E; Tue, 25 Jan 2022 06:20:55 -0800 (PST) Received: from p8cg001049571a15.arm.com (unknown [10.163.42.158]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id EA5313F793; Tue, 25 Jan 2022 06:20:50 -0800 (PST) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Mathieu Poirier , Suzuki Poulose , coresight@lists.linaro.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V3 RESEND 0/7] coresight: trbe: Workaround Cortex-A510 erratas Date: Tue, 25 Jan 2022 19:50:30 +0530 Message-Id: <1643120437-14352-1-git-send-email-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220125_062056_952626_9DAFA04A X-CRM114-Status: GOOD ( 10.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series adds three different workarounds in the TRBE driver for Cortex-A510 specific erratas. But first, this adds Cortex-A510 specific cpu part number definition in the platform. This series applies on 5.17-rc1. Relevant errata documents can be found here. https://developer.arm.com/documentation/SDEN2397239/900 https://developer.arm.com/documentation/SDEN2397589/900 Changes in V3: https://lore.kernel.org/all/1641872346-3270-1-git-send-email-anshuman.khandual@arm.com/ - Moved the comment inside trbe_needs_drain_after_disable() - Moved the comment inside trbe_needs_ctxt_sync_after_enable() Changes in V2: https://lore.kernel.org/all/1641517808-5735-1-git-send-email-anshuman.khandual@arm.com/ Accommodated most review comments from the previous version. - Split all patches into CPU errata definition, detection and TRBE workarounds - s/TRBE_WORKAROUND_SYSREG_WRITE_FAILURE/TRBE_NEEDS_DRAIN_AFTER_DISABLE - s/TRBE_WORKAROUND_CORRUPTION_WITH_ENABLE/TRBE_NEEDS_CTXT_SYNC_AFTER_ENABLE - s/trbe_may_fail_sysreg_write()/trbe_needs_drain_after_disable() - s/trbe_may_corrupt_with_enable()/trbe_needs_ctxt_sync_after_enable() - Updated Kconfig help message for config ARM64_ERRATUM_1902691 - Updated error message for trbe_is_broken() detection - Added new trblimitr parameter to set_trbe_enabled(), improving performance - Added COMPILE_TEST dependency in the errata, until TRBE part is available Changes in V1: https://lore.kernel.org/lkml/1641359159-22726-1-git-send-email-anshuman.khandual@arm.com/ Cc: Catalin Marinas Cc: Will Deacon Cc: Mathieu Poirier Cc: Suzuki Poulose Cc: coresight@lists.linaro.org Cc: linux-doc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Anshuman Khandual (7): arm64: Add Cortex-A510 CPU part definition arm64: errata: Add detection for TRBE ignored system register writes arm64: errata: Add detection for TRBE invalid prohibited states arm64: errata: Add detection for TRBE trace data corruption coresight: trbe: Work around the ignored system register writes coresight: trbe: Work around the invalid prohibited states coresight: trbe: Work around the trace data corruption Documentation/arm64/silicon-errata.rst | 6 + arch/arm64/Kconfig | 59 ++++++++++ arch/arm64/include/asm/cputype.h | 2 + arch/arm64/kernel/cpu_errata.c | 27 +++++ arch/arm64/tools/cpucaps | 3 + drivers/hwtracing/coresight/coresight-trbe.c | 114 ++++++++++++++----- drivers/hwtracing/coresight/coresight-trbe.h | 8 -- 7 files changed, 183 insertions(+), 36 deletions(-) -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel