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From: <gregkh@linuxfoundation.org>
To: anshuman.khandual@arm.com, catalin.marinas@arm.com,
	gregkh@linuxfoundation.org, james.morse@arm.com,
	linux-arm-kernel@lists.infradead.org, suzuki.poulose@arm.com,
	will@kernel.org
Cc: <stable-commits@vger.kernel.org>
Subject: Patch "arm64: Add Cortex-X2 CPU part definition" has been added to the 4.19-stable tree
Date: Sat, 19 Mar 2022 13:52:34 +0100	[thread overview]
Message-ID: <16476943548558@kroah.com> (raw)
In-Reply-To: <20220318174842.2321061-4-james.morse@arm.com>


This is a note to let you know that I've just added the patch titled

    arm64: Add Cortex-X2 CPU part definition

to the 4.19-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-add-cortex-x2-cpu-part-definition.patch
and it can be found in the queue-4.19 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


From foo@baz Sat Mar 19 01:51:18 PM CET 2022
From: James Morse <james.morse@arm.com>
Date: Fri, 18 Mar 2022 17:48:23 +0000
Subject: arm64: Add Cortex-X2 CPU part definition
To: stable@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, james.morse@arm.com, catalin.marinas@arm.com
Message-ID: <20220318174842.2321061-4-james.morse@arm.com>

From: Anshuman Khandual <anshuman.khandual@arm.com>

commit 72bb9dcb6c33cfac80282713c2b4f2b254cd24d1 upstream.

Add the CPU Partnumbers for the new Arm designs.

Cc: Will Deacon <will@kernel.org>
Cc: Suzuki Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1642994138-25887-2-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm64/include/asm/cputype.h |    2 ++
 1 file changed, 2 insertions(+)

--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -83,6 +83,7 @@
 #define ARM_CPU_PART_NEOVERSE_N1	0xD0C
 #define ARM_CPU_PART_CORTEX_A77		0xD0D
 #define ARM_CPU_PART_CORTEX_A710	0xD47
+#define ARM_CPU_PART_CORTEX_X2		0xD48
 #define ARM_CPU_PART_NEOVERSE_N2	0xD49
 
 #define APM_CPU_PART_POTENZA		0x000
@@ -114,6 +115,7 @@
 #define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
 #define MIDR_CORTEX_A77	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
 #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)
+#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
 #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
 #define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
 #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)


Patches currently in stable-queue which might be from james.morse@arm.com are

queue-4.19/arm64-entry-add-macro-for-reading-symbol-addresses-from-the-trampoline.patch
queue-4.19/arm64-use-the-clearbhb-instruction-in-mitigations.patch
queue-4.19/arm64-add-percpu-vectors-for-el1.patch
queue-4.19/arm64-entry-free-up-another-register-on-kpti-s-tramp_exit-path.patch
queue-4.19/arm64-entry-don-t-assume-tramp_vectors-is-the-start-of-the-vectors.patch
queue-4.19/arm64-entry-make-the-trampoline-cleanup-optional.patch
queue-4.19/kvm-arm64-add-templates-for-bhb-mitigation-sequences.patch
queue-4.19/arm64-entry-add-non-kpti-__bp_harden_el1_vectors-for-mitigations.patch
queue-4.19/arm64-add-id_aa64isar2_el1-sys-register.patch
queue-4.19/kvm-arm64-allow-smccc_arch_workaround_3-to-be-discovered-and-migrated.patch
queue-4.19/arm64-add-neoverse-n2-cortex-a710-cpu-part-definition.patch
queue-4.19/arm64-entry-move-trampoline-macros-out-of-ifdef-d-section.patch
queue-4.19/arm64-entry-allow-tramp_alias-to-access-symbols-after-the-4k-boundary.patch
queue-4.19/arm64-add-part-number-for-arm-cortex-a77.patch
queue-4.19/arm64-entry-move-the-trampoline-data-page-before-the-text-page.patch
queue-4.19/arm64-entry.s-add-ventry-overflow-sanity-checks.patch
queue-4.19/arm64-entry-add-vectors-that-have-the-bhb-mitigation-sequences.patch
queue-4.19/arm64-mitigate-spectre-style-branch-history-side-channels.patch
queue-4.19/arm64-entry-allow-the-trampoline-text-to-occupy-multiple-pages.patch
queue-4.19/arm64-proton-pack-report-spectre-bhb-vulnerabilities-as-part-of-spectre-v2.patch
queue-4.19/arm64-add-cortex-x2-cpu-part-definition.patch
queue-4.19/arm64-entry-make-the-kpti-trampoline-s-kpti-sequence-optional.patch

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           reply	other threads:[~2022-03-19 12:54 UTC|newest]

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