From: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>
To: will@kernel.org, mark.rutland@arm.com, peterz@infradead.org,
mingo@redhat.com, acme@kernel.org,
alexander.shishkin@linux.intel.com, jolsa@kernel.org,
namhyung@kernel.org, catalin.marinas@arm.com,
linux-arm-kernel@lists.infradead.org,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>
Subject: [PATCH V2] arm64: perf: Retain PMCR.X of PMCR_EL0 during reset
Date: Fri, 29 Apr 2022 16:59:09 +0530 [thread overview]
Message-ID: <1651231749-19565-1-git-send-email-quic_c_spathi@quicinc.com> (raw)
Preserve the bit PMCR.X of PMCR_EL0 during PMU reset to export
PMU events. as it could be set before PMU initialization.
Signed-off-by: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>
---
Changes since V1:
- Preserving only PMCR_X bit as per Robin Murphy's comment
---
arch/arm64/kernel/perf_event.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index cb69ff1..532a417 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -1047,6 +1047,9 @@ static void armv8pmu_reset(void *info)
if (armv8pmu_has_long_event(cpu_pmu))
pmcr |= ARMV8_PMU_PMCR_LP;
+ /* Preserve PMCR_X to export PMU events */
+ pmcr |= (armv8pmu_pmcr_read() & ARMV8_PMU_PMCR_X);
+
armv8pmu_pmcr_write(pmcr);
}
--
2.7.4
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next reply other threads:[~2022-04-29 11:30 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-29 11:29 Srinivasarao Pathipati [this message]
2022-05-06 14:12 ` [PATCH V2] arm64: perf: Retain PMCR.X of PMCR_EL0 during reset Will Deacon
2022-05-09 13:21 ` Srinivasarao Pathipati
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