From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6FE75C433EF for ; Wed, 4 May 2022 19:59:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=KPEy8BvehP3JCkFqtLbvrpg4tLKYm2k+xbUKmDq4l4c=; b=yyj5PIzIvAJnq7 N6a7qkqQ/6dmFb/LHgWNLFU76tFjr4EA6gCxHPN1eeCtZ2CF4YYdHPfsE5syf5SMCutURUwp6nCmu CwyUJYI6pYKSSJbNTW0CKkbceDGe6KmfJDtW5CVCNDTImVzDPMDroIgBaww/waiG91ZO/Z5MO+dRM P30qDghrKFZTDDyGK71E/K5yH1p7BlkQLKf1+HcHuM71NjaXjWjc1jfllIyQL9m0d9N8pxNHVNbfo Fn+gP+CmUxooxRyk4vEBEqJTTyZOSgoqNjXu/R+oruRuXfQjhAJoePgkDwUf0DVVRD7+Bxz4ZxbBw P8/PplCm1Q2VXeACdtnA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmL95-00CSIQ-LR; Wed, 04 May 2022 19:58:47 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmL91-00CSG3-SD for linux-arm-kernel@lists.infradead.org; Wed, 04 May 2022 19:58:45 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 84C6FB828AA; Wed, 4 May 2022 19:58:42 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B578FC385B0; Wed, 4 May 2022 19:58:39 +0000 (UTC) From: Catalin Marinas To: Mark Brown , Will Deacon Cc: Mark Rutland , linux-arm-kernel@lists.infradead.org, Suzuki K Poulose , Marc Zyngier Subject: Re: [PATCH v6 00/12] arm64: Automatic system register definition generation Date: Wed, 4 May 2022 20:58:37 +0100 Message-Id: <165169430751.2576442.2265626652799986072.b4-ty@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220503170233.507788-1-broonie@kernel.org> References: <20220503170233.507788-1-broonie@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220504_125844_072780_7C375115 X-CRM114-Status: GOOD ( 11.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 3 May 2022 18:02:21 +0100, Mark Brown wrote: > The arm64 kernel requires some metadata for each system register it may > need to access. Currently we have: > > * A SYS_ definition which sorresponds to a sys_reg() macro. > This is used both to look up a sysreg by encoding (e.g. in KVM), and > also to generate code to access a sysreg where the assembler is > unaware of the specific sysreg encoding. > > [...] Applied to arm64 (for-next/sysreg-gen), thanks! [01/12] arm64/sysreg: Introduce helpers for access to sysreg fields https://git.kernel.org/arm64/c/e6a6b34f97ef [02/12] arm64/mte: Make TCF0 naming and field values more standard https://git.kernel.org/arm64/c/96f101a9eab4 [03/12] arm64/mte: Make TCF field values and naming more standard https://git.kernel.org/arm64/c/bc249e37b933 [04/12] arm64/sysreg: Rename SCTLR_EL1_NTWE/TWI to SCTLR_EL1_nTWE/TWI https://git.kernel.org/arm64/c/e4e6a9d5593c [05/12] arm64/sysreg: Define bits for previously RES1 fields in SCTLR_EL1 https://git.kernel.org/arm64/c/56eb621b8ab6 [06/12] arm64: Update name of ID_AA64ISAR0_EL1_ATOMIC to reflect ARM https://git.kernel.org/arm64/c/6329eb543d99 [07/12] arm64/sysreg: Standardise ID_AA64ISAR0_EL1 macro names https://git.kernel.org/arm64/c/0eda2ec48907 [08/12] arm64: Add sysreg header generation scripting https://git.kernel.org/arm64/c/66847e0618d7 [09/12] arm64/sysreg: Enable automatic generation of system register definitions https://git.kernel.org/arm64/c/c07d8017bceb [10/12] arm64/sysreg: Generate definitions for ID_AA64ISAR0_EL1 https://git.kernel.org/arm64/c/e33bb6461cd6 [11/12] arm64/sysreg: Generate definitions for TTBRn_EL1 https://git.kernel.org/arm64/c/41fde735062d [12/12] arm64/sysreg: Generate definitions for SCTLR_EL1 https://git.kernel.org/arm64/c/7a41a97b65ea -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel