* [PATCH 1/8] dt-bindings: nvmem: Convert rockchip-otp.txt to dt-schema
2023-05-01 8:43 [PATCH 0/8] Add RK3588 OTP memory support Cristian Ciocaltea
@ 2023-05-01 8:43 ` Cristian Ciocaltea
2023-05-02 8:38 ` Heiko Stübner
2023-05-03 6:27 ` Krzysztof Kozlowski
2023-05-01 8:43 ` [PATCH 2/8] dt-bindings: nvmem: rockchip-otp: Add compatible for RK3588 Cristian Ciocaltea
` (7 subsequent siblings)
8 siblings, 2 replies; 25+ messages in thread
From: Cristian Ciocaltea @ 2023-05-01 8:43 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Heiko Stuebner, Philipp Zabel, Sebastian Reichel, Shreeya Patel,
Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Convert the Rockchip OTP memory bindings to dt-schema.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
.../bindings/nvmem/rockchip-otp.txt | 25 ------
.../bindings/nvmem/rockchip-otp.yaml | 83 +++++++++++++++++++
2 files changed, 83 insertions(+), 25 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
create mode 100644 Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt b/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
deleted file mode 100644
index 40f649f7c2e5..000000000000
--- a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-Rockchip internal OTP (One Time Programmable) memory device tree bindings
-
-Required properties:
-- compatible: Should be one of the following.
- - "rockchip,px30-otp" - for PX30 SoCs.
- - "rockchip,rk3308-otp" - for RK3308 SoCs.
-- reg: Should contain the registers location and size
-- clocks: Must contain an entry for each entry in clock-names.
-- clock-names: Should be "otp", "apb_pclk" and "phy".
-- resets: Must contain an entry for each entry in reset-names.
- See ../../reset/reset.txt for details.
-- reset-names: Should be "phy".
-
-See nvmem.txt for more information.
-
-Example:
- otp: otp@ff290000 {
- compatible = "rockchip,px30-otp";
- reg = <0x0 0xff290000 0x0 0x4000>;
- #address-cells = <1>;
- #size-cells = <1>;
- clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
- <&cru PCLK_OTP_PHY>;
- clock-names = "otp", "apb_pclk", "phy";
- };
diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
new file mode 100644
index 000000000000..658ceed14ee2
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/rockchip-otp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip internal OTP (One Time Programmable) memory
+
+maintainers:
+ - Heiko Stuebner <heiko@sntech.de>
+
+allOf:
+ - $ref: nvmem.yaml#
+
+properties:
+ compatible:
+ enum:
+ - rockchip,px30-otp
+ - rockchip,rk3308-otp
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ minItems: 3
+ maxItems: 3
+
+ clock-names:
+ items:
+ - const: otp
+ - const: apb_pclk
+ - const: phy
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ items:
+ - const: phy
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/px30-cru.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ otp: efuse@ff290000 {
+ compatible = "rockchip,px30-otp";
+ reg = <0x0 0xff290000 0x0 0x4000>;
+ clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
+ <&cru PCLK_OTP_PHY>;
+ clock-names = "otp", "apb_pclk", "phy";
+ resets = <&cru SRST_OTP_PHY>;
+ reset-names = "phy";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpu_id: id@7 {
+ reg = <0x07 0x10>;
+ };
+
+ cpu_leakage: cpu-leakage@17 {
+ reg = <0x17 0x1>;
+ };
+
+ performance: performance@1e {
+ reg = <0x1e 0x1>;
+ bits = <4 3>;
+ };
+ };
+ };
--
2.40.0
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^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 1/8] dt-bindings: nvmem: Convert rockchip-otp.txt to dt-schema
2023-05-01 8:43 ` [PATCH 1/8] dt-bindings: nvmem: Convert rockchip-otp.txt to dt-schema Cristian Ciocaltea
@ 2023-05-02 8:38 ` Heiko Stübner
2023-05-03 6:27 ` Krzysztof Kozlowski
1 sibling, 0 replies; 25+ messages in thread
From: Heiko Stübner @ 2023-05-02 8:38 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Philipp Zabel, Sebastian Reichel, Shreeya Patel, Kever Yang,
Finley Xiao, Cristian Ciocaltea
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Am Montag, 1. Mai 2023, 10:43:53 CEST schrieb Cristian Ciocaltea:
> Convert the Rockchip OTP memory bindings to dt-schema.
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
> .../bindings/nvmem/rockchip-otp.txt | 25 ------
> .../bindings/nvmem/rockchip-otp.yaml | 83 +++++++++++++++++++
> 2 files changed, 83 insertions(+), 25 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
> create mode 100644 Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
>
> diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt b/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
> deleted file mode 100644
> index 40f649f7c2e5..000000000000
> --- a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -Rockchip internal OTP (One Time Programmable) memory device tree bindings
> -
> -Required properties:
> -- compatible: Should be one of the following.
> - - "rockchip,px30-otp" - for PX30 SoCs.
> - - "rockchip,rk3308-otp" - for RK3308 SoCs.
> -- reg: Should contain the registers location and size
> -- clocks: Must contain an entry for each entry in clock-names.
> -- clock-names: Should be "otp", "apb_pclk" and "phy".
> -- resets: Must contain an entry for each entry in reset-names.
> - See ../../reset/reset.txt for details.
> -- reset-names: Should be "phy".
> -
> -See nvmem.txt for more information.
> -
> -Example:
> - otp: otp@ff290000 {
> - compatible = "rockchip,px30-otp";
> - reg = <0x0 0xff290000 0x0 0x4000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
> - <&cru PCLK_OTP_PHY>;
> - clock-names = "otp", "apb_pclk", "phy";
> - };
> diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
> new file mode 100644
> index 000000000000..658ceed14ee2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
> @@ -0,0 +1,83 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/nvmem/rockchip-otp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip internal OTP (One Time Programmable) memory
> +
> +maintainers:
> + - Heiko Stuebner <heiko@sntech.de>
> +
> +allOf:
> + - $ref: nvmem.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - rockchip,px30-otp
> + - rockchip,rk3308-otp
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + minItems: 3
> + maxItems: 3
> +
> + clock-names:
> + items:
> + - const: otp
> + - const: apb_pclk
> + - const: phy
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + items:
> + - const: phy
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - resets
> + - reset-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/px30-cru.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + otp: efuse@ff290000 {
> + compatible = "rockchip,px30-otp";
> + reg = <0x0 0xff290000 0x0 0x4000>;
> + clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
> + <&cru PCLK_OTP_PHY>;
> + clock-names = "otp", "apb_pclk", "phy";
> + resets = <&cru SRST_OTP_PHY>;
> + reset-names = "phy";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpu_id: id@7 {
> + reg = <0x07 0x10>;
> + };
> +
> + cpu_leakage: cpu-leakage@17 {
> + reg = <0x17 0x1>;
> + };
> +
> + performance: performance@1e {
> + reg = <0x1e 0x1>;
> + bits = <4 3>;
> + };
> + };
> + };
>
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 1/8] dt-bindings: nvmem: Convert rockchip-otp.txt to dt-schema
2023-05-01 8:43 ` [PATCH 1/8] dt-bindings: nvmem: Convert rockchip-otp.txt to dt-schema Cristian Ciocaltea
2023-05-02 8:38 ` Heiko Stübner
@ 2023-05-03 6:27 ` Krzysztof Kozlowski
1 sibling, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2023-05-03 6:27 UTC (permalink / raw)
To: Cristian Ciocaltea, Srinivas Kandagatla, Rob Herring,
Krzysztof Kozlowski, Heiko Stuebner, Philipp Zabel,
Sebastian Reichel, Shreeya Patel, Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
On 01/05/2023 10:43, Cristian Ciocaltea wrote:
> Convert the Rockchip OTP memory bindings to dt-schema.
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
> .../bindings/nvmem/rockchip-otp.txt | 25 ------
> .../bindings/nvmem/rockchip-otp.yaml | 83 +++++++++++++++++++
> 2 files changed, 83 insertions(+), 25 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
> create mode 100644 Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
>
> diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt b/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
> deleted file mode 100644
> index 40f649f7c2e5..000000000000
> --- a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -Rockchip internal OTP (One Time Programmable) memory device tree bindings
> -
> -Required properties:
> -- compatible: Should be one of the following.
> - - "rockchip,px30-otp" - for PX30 SoCs.
> - - "rockchip,rk3308-otp" - for RK3308 SoCs.
> -- reg: Should contain the registers location and size
> -- clocks: Must contain an entry for each entry in clock-names.
> -- clock-names: Should be "otp", "apb_pclk" and "phy".
> -- resets: Must contain an entry for each entry in reset-names.
> - See ../../reset/reset.txt for details.
> -- reset-names: Should be "phy".
> -
> -See nvmem.txt for more information.
> -
> -Example:
> - otp: otp@ff290000 {
> - compatible = "rockchip,px30-otp";
> - reg = <0x0 0xff290000 0x0 0x4000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
> - <&cru PCLK_OTP_PHY>;
> - clock-names = "otp", "apb_pclk", "phy";
> - };
> diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
> new file mode 100644
> index 000000000000..658ceed14ee2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
Filename matching compatible, or at least it format. rockchip,otp
> @@ -0,0 +1,83 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/nvmem/rockchip-otp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip internal OTP (One Time Programmable) memory
> +
> +maintainers:
> + - Heiko Stuebner <heiko@sntech.de>
> +
> +allOf:
> + - $ref: nvmem.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - rockchip,px30-otp
> + - rockchip,rk3308-otp
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + minItems: 3
Drop minItems, not needed when equal to max.
> + maxItems: 3
> +
> + clock-names:
Best regards,
Krzysztof
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 2/8] dt-bindings: nvmem: rockchip-otp: Add compatible for RK3588
2023-05-01 8:43 [PATCH 0/8] Add RK3588 OTP memory support Cristian Ciocaltea
2023-05-01 8:43 ` [PATCH 1/8] dt-bindings: nvmem: Convert rockchip-otp.txt to dt-schema Cristian Ciocaltea
@ 2023-05-01 8:43 ` Cristian Ciocaltea
2023-05-02 8:42 ` Heiko Stübner
2023-05-03 6:28 ` Krzysztof Kozlowski
2023-05-01 8:43 ` [PATCH 3/8] nvmem: rockchip-otp: Add clocks and reg_read to rockchip_data Cristian Ciocaltea
` (6 subsequent siblings)
8 siblings, 2 replies; 25+ messages in thread
From: Cristian Ciocaltea @ 2023-05-01 8:43 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Heiko Stuebner, Philipp Zabel, Sebastian Reichel, Shreeya Patel,
Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Document the OTP memory found on Rockchip RK3588 SoC.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
.../bindings/nvmem/rockchip-otp.yaml | 71 ++++++++++++++++---
1 file changed, 60 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
index 658ceed14ee2..84a11382c6e7 100644
--- a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
+++ b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
@@ -9,34 +9,31 @@ title: Rockchip internal OTP (One Time Programmable) memory
maintainers:
- Heiko Stuebner <heiko@sntech.de>
-allOf:
- - $ref: nvmem.yaml#
-
properties:
compatible:
enum:
- rockchip,px30-otp
- rockchip,rk3308-otp
+ - rockchip,rk3588-otp
reg:
maxItems: 1
clocks:
minItems: 3
- maxItems: 3
+ maxItems: 4
clock-names:
- items:
- - const: otp
- - const: apb_pclk
- - const: phy
+ minItems: 3
+ maxItems: 4
resets:
- maxItems: 1
+ minItems: 1
+ maxItems: 3
reset-names:
- items:
- - const: phy
+ minItems: 1
+ maxItems: 3
required:
- compatible
@@ -46,6 +43,58 @@ required:
- resets
- reset-names
+allOf:
+ - $ref: nvmem.yaml#
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - rockchip,px30-otp
+ - rockchip,rk3308-otp
+ then:
+ properties:
+ clocks:
+ minItems: 3
+ maxItems: 3
+ clock-names:
+ items:
+ - const: otp
+ - const: apb_pclk
+ - const: phy
+ resets:
+ maxItems: 1
+ reset-names:
+ items:
+ - const: phy
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - rockchip,rk3588-otp
+ then:
+ properties:
+ clocks:
+ minItems: 4
+ maxItems: 4
+ clock-names:
+ items:
+ - const: otpc
+ - const: apb
+ - const: arb
+ - const: phy
+ resets:
+ minItems: 1
+ maxItems: 3
+ reset-names:
+ items:
+ - const: otpc
+ - const: apb
+ - const: arb
+
unevaluatedProperties: false
examples:
--
2.40.0
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^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 2/8] dt-bindings: nvmem: rockchip-otp: Add compatible for RK3588
2023-05-01 8:43 ` [PATCH 2/8] dt-bindings: nvmem: rockchip-otp: Add compatible for RK3588 Cristian Ciocaltea
@ 2023-05-02 8:42 ` Heiko Stübner
2023-05-02 12:46 ` Cristian Ciocaltea
2023-05-03 6:28 ` Krzysztof Kozlowski
1 sibling, 1 reply; 25+ messages in thread
From: Heiko Stübner @ 2023-05-02 8:42 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Philipp Zabel, Sebastian Reichel, Shreeya Patel, Kever Yang,
Finley Xiao, Cristian Ciocaltea
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Hi,
Am Montag, 1. Mai 2023, 10:43:54 CEST schrieb Cristian Ciocaltea:
> Document the OTP memory found on Rockchip RK3588 SoC.
nit: I guess the changed clock and resets configuration for rk3588 variants
could be mentioned in the commit message.
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
> .../bindings/nvmem/rockchip-otp.yaml | 71 ++++++++++++++++---
> 1 file changed, 60 insertions(+), 11 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
> index 658ceed14ee2..84a11382c6e7 100644
> --- a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
> +++ b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
> @@ -9,34 +9,31 @@ title: Rockchip internal OTP (One Time Programmable) memory
> maintainers:
> - Heiko Stuebner <heiko@sntech.de>
>
> -allOf:
> - - $ref: nvmem.yaml#
> -
> properties:
> compatible:
> enum:
> - rockchip,px30-otp
> - rockchip,rk3308-otp
> + - rockchip,rk3588-otp
>
> reg:
> maxItems: 1
>
> clocks:
> minItems: 3
> - maxItems: 3
> + maxItems: 4
>
> clock-names:
> - items:
> - - const: otp
> - - const: apb_pclk
> - - const: phy
> + minItems: 3
> + maxItems: 4
>
> resets:
> - maxItems: 1
> + minItems: 1
> + maxItems: 3
>
> reset-names:
> - items:
> - - const: phy
> + minItems: 1
> + maxItems: 3
>
> required:
> - compatible
> @@ -46,6 +43,58 @@ required:
> - resets
> - reset-names
>
> +allOf:
> + - $ref: nvmem.yaml#
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - rockchip,px30-otp
> + - rockchip,rk3308-otp
> + then:
> + properties:
> + clocks:
> + minItems: 3
> + maxItems: 3
> + clock-names:
> + items:
> + - const: otp
> + - const: apb_pclk
> + - const: phy
> + resets:
> + maxItems: 1
> + reset-names:
> + items:
> + - const: phy
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - rockchip,rk3588-otp
> + then:
> + properties:
> + clocks:
> + minItems: 4
> + maxItems: 4
> + clock-names:
> + items:
> + - const: otpc
> + - const: apb
> + - const: arb
> + - const: phy
> + resets:
> + minItems: 1
> + maxItems: 3
> + reset-names:
> + items:
> + - const: otpc
> + - const: apb
> + - const: arb
> +
> unevaluatedProperties: false
>
> examples:
>
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 2/8] dt-bindings: nvmem: rockchip-otp: Add compatible for RK3588
2023-05-02 8:42 ` Heiko Stübner
@ 2023-05-02 12:46 ` Cristian Ciocaltea
0 siblings, 0 replies; 25+ messages in thread
From: Cristian Ciocaltea @ 2023-05-02 12:46 UTC (permalink / raw)
To: Heiko Stübner, Srinivas Kandagatla, Rob Herring,
Krzysztof Kozlowski, Philipp Zabel, Sebastian Reichel,
Shreeya Patel, Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Hello Heiko,
On 5/2/23 11:42, Heiko Stübner wrote:
> Hi,
>
> Am Montag, 1. Mai 2023, 10:43:54 CEST schrieb Cristian Ciocaltea:
>> Document the OTP memory found on Rockchip RK3588 SoC.
>
> nit: I guess the changed clock and resets configuration for rk3588 variants
> could be mentioned in the commit message.
Sure, I will update the commit message if a new revision of the patch
series is required.
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Thanks for reviewing!
Regards,
Cristian
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 2/8] dt-bindings: nvmem: rockchip-otp: Add compatible for RK3588
2023-05-01 8:43 ` [PATCH 2/8] dt-bindings: nvmem: rockchip-otp: Add compatible for RK3588 Cristian Ciocaltea
2023-05-02 8:42 ` Heiko Stübner
@ 2023-05-03 6:28 ` Krzysztof Kozlowski
2023-05-04 14:14 ` Cristian Ciocaltea
1 sibling, 1 reply; 25+ messages in thread
From: Krzysztof Kozlowski @ 2023-05-03 6:28 UTC (permalink / raw)
To: Cristian Ciocaltea, Srinivas Kandagatla, Rob Herring,
Krzysztof Kozlowski, Heiko Stuebner, Philipp Zabel,
Sebastian Reichel, Shreeya Patel, Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
On 01/05/2023 10:43, Cristian Ciocaltea wrote:
> Document the OTP memory found on Rockchip RK3588 SoC.
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
> .../bindings/nvmem/rockchip-otp.yaml | 71 ++++++++++++++++---
> 1 file changed, 60 insertions(+), 11 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
> index 658ceed14ee2..84a11382c6e7 100644
> --- a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
> +++ b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
> @@ -9,34 +9,31 @@ title: Rockchip internal OTP (One Time Programmable) memory
> maintainers:
> - Heiko Stuebner <heiko@sntech.de>
>
> -allOf:
> - - $ref: nvmem.yaml#
> -
> properties:
> compatible:
> enum:
> - rockchip,px30-otp
> - rockchip,rk3308-otp
> + - rockchip,rk3588-otp
>
> reg:
> maxItems: 1
>
> clocks:
> minItems: 3
> - maxItems: 3
> + maxItems: 4
>
> clock-names:
> - items:
> - - const: otp
> - - const: apb_pclk
> - - const: phy
> + minItems: 3
> + maxItems: 4
>
> resets:
> - maxItems: 1
> + minItems: 1
> + maxItems: 3
>
> reset-names:
> - items:
> - - const: phy
> + minItems: 1
> + maxItems: 3
>
> required:
> - compatible
> @@ -46,6 +43,58 @@ required:
> - resets
> - reset-names
>
> +allOf:
> + - $ref: nvmem.yaml#
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - rockchip,px30-otp
> + - rockchip,rk3308-otp
> + then:
> + properties:
> + clocks:
> + minItems: 3
> + maxItems: 3
> + clock-names:
> + items:
> + - const: otp
> + - const: apb_pclk
> + - const: phy
> + resets:
> + maxItems: 1
> + reset-names:
> + items:
> + - const: phy
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - rockchip,rk3588-otp
> + then:
> + properties:
> + clocks:
> + minItems: 4
> + maxItems: 4
> + clock-names:
> + items:
> + - const: otpc
> + - const: apb
> + - const: arb
> + - const: phy
Keep the same order of clocks as in older variants, so you can keep the
list in top-level place and here only minItems: 4.
> + resets:
> + minItems: 1
> + maxItems: 3
> + reset-names:
> + items:
> + - const: otpc
Shouldn't this be phy?
Best regards,
Krzysztof
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 2/8] dt-bindings: nvmem: rockchip-otp: Add compatible for RK3588
2023-05-03 6:28 ` Krzysztof Kozlowski
@ 2023-05-04 14:14 ` Cristian Ciocaltea
2023-05-04 14:39 ` Krzysztof Kozlowski
0 siblings, 1 reply; 25+ messages in thread
From: Cristian Ciocaltea @ 2023-05-04 14:14 UTC (permalink / raw)
To: Krzysztof Kozlowski, Srinivas Kandagatla, Rob Herring,
Krzysztof Kozlowski, Heiko Stuebner, Philipp Zabel,
Sebastian Reichel, Shreeya Patel, Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
On 5/3/23 09:28, Krzysztof Kozlowski wrote:
> On 01/05/2023 10:43, Cristian Ciocaltea wrote:
>> Document the OTP memory found on Rockchip RK3588 SoC.
>>
>> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
>> ---
>> .../bindings/nvmem/rockchip-otp.yaml | 71 ++++++++++++++++---
>> 1 file changed, 60 insertions(+), 11 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
>> index 658ceed14ee2..84a11382c6e7 100644
>> --- a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
>> +++ b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml
>> @@ -9,34 +9,31 @@ title: Rockchip internal OTP (One Time Programmable) memory
>> maintainers:
>> - Heiko Stuebner <heiko@sntech.de>
>>
>> -allOf:
>> - - $ref: nvmem.yaml#
>> -
>> properties:
>> compatible:
>> enum:
>> - rockchip,px30-otp
>> - rockchip,rk3308-otp
>> + - rockchip,rk3588-otp
>>
>> reg:
>> maxItems: 1
>>
>> clocks:
>> minItems: 3
>> - maxItems: 3
>> + maxItems: 4
>>
>> clock-names:
>> - items:
>> - - const: otp
>> - - const: apb_pclk
>> - - const: phy
>> + minItems: 3
>> + maxItems: 4
>>
>> resets:
>> - maxItems: 1
>> + minItems: 1
>> + maxItems: 3
>>
>> reset-names:
>> - items:
>> - - const: phy
>> + minItems: 1
>> + maxItems: 3
>>
>> required:
>> - compatible
>> @@ -46,6 +43,58 @@ required:
>> - resets
>> - reset-names
>>
>> +allOf:
>> + - $ref: nvmem.yaml#
>> +
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - rockchip,px30-otp
>> + - rockchip,rk3308-otp
>> + then:
>> + properties:
>> + clocks:
>> + minItems: 3
>> + maxItems: 3
>> + clock-names:
>> + items:
>> + - const: otp
>> + - const: apb_pclk
>> + - const: phy
>> + resets:
>> + maxItems: 1
>> + reset-names:
>> + items:
>> + - const: phy
>> +
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - rockchip,rk3588-otp
>> + then:
>> + properties:
>> + clocks:
>> + minItems: 4
>> + maxItems: 4
>> + clock-names:
>> + items:
>> + - const: otpc
>> + - const: apb
>> + - const: arb
>> + - const: phy
>
> Keep the same order of clocks as in older variants, so you can keep the
> list in top-level place and here only minItems: 4.
>
>> + resets:
>> + minItems: 1
>> + maxItems: 3
>> + reset-names:
>> + items:
>> + - const: otpc
>
> Shouldn't this be phy?
It seems there is no reset for PHY, or at least I couldn't find any
reference in the RK3588 TRM, nor in the downstream driver implementation.
Thanks for reviewing! I will prepare v2 with all the requested changes.
Kind regards,
Cristian
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 2/8] dt-bindings: nvmem: rockchip-otp: Add compatible for RK3588
2023-05-04 14:14 ` Cristian Ciocaltea
@ 2023-05-04 14:39 ` Krzysztof Kozlowski
0 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2023-05-04 14:39 UTC (permalink / raw)
To: Cristian Ciocaltea, Srinivas Kandagatla, Rob Herring,
Krzysztof Kozlowski, Heiko Stuebner, Philipp Zabel,
Sebastian Reichel, Shreeya Patel, Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
On 04/05/2023 16:14, Cristian Ciocaltea wrote:
>>> + reset-names:
>>> + items:
>>> + - const: phy
>>> +
>>> + - if:
>>> + properties:
>>> + compatible:
>>> + contains:
>>> + enum:
>>> + - rockchip,rk3588-otp
>>> + then:
>>> + properties:
>>> + clocks:
>>> + minItems: 4
>>> + maxItems: 4
>>> + clock-names:
>>> + items:
>>> + - const: otpc
>>> + - const: apb
>>> + - const: arb
>>> + - const: phy
>>
>> Keep the same order of clocks as in older variants, so you can keep the
>> list in top-level place and here only minItems: 4.
>>
>>> + resets:
>>> + minItems: 1
>>> + maxItems: 3
>>> + reset-names:
>>> + items:
>>> + - const: otpc
>>
>> Shouldn't this be phy?
>
> It seems there is no reset for PHY, or at least I couldn't find any
> reference in the RK3588 TRM, nor in the downstream driver implementation.
OK, just to be sure that this is not the same reset as rk3308 just
differently named in consumer.
Best regards,
Krzysztof
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^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 3/8] nvmem: rockchip-otp: Add clocks and reg_read to rockchip_data
2023-05-01 8:43 [PATCH 0/8] Add RK3588 OTP memory support Cristian Ciocaltea
2023-05-01 8:43 ` [PATCH 1/8] dt-bindings: nvmem: Convert rockchip-otp.txt to dt-schema Cristian Ciocaltea
2023-05-01 8:43 ` [PATCH 2/8] dt-bindings: nvmem: rockchip-otp: Add compatible for RK3588 Cristian Ciocaltea
@ 2023-05-01 8:43 ` Cristian Ciocaltea
2023-05-02 8:47 ` Heiko Stübner
2023-05-01 8:43 ` [PATCH 4/8] nvmem: rockchip-otp: Generalize rockchip_otp_wait_status() Cristian Ciocaltea
` (5 subsequent siblings)
8 siblings, 1 reply; 25+ messages in thread
From: Cristian Ciocaltea @ 2023-05-01 8:43 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Heiko Stuebner, Philipp Zabel, Sebastian Reichel, Shreeya Patel,
Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
In preparation to support new Rockchip OTP memory devices with different
clock configurations and register layout, extend rockchip_data struct
with the related members: clocks, num_clks, reg_read.
Additionally, to avoid managing redundant driver data, drop num_clks
member from rockchip_otp struct and update all references to point to
the equivalent member in rockchip_data.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
drivers/nvmem/rockchip-otp.c | 79 ++++++++++++++++++++++--------------
1 file changed, 49 insertions(+), 30 deletions(-)
diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c
index 9f53bcce2f87..a5b234e60735 100644
--- a/drivers/nvmem/rockchip-otp.c
+++ b/drivers/nvmem/rockchip-otp.c
@@ -54,21 +54,19 @@
#define OTPC_TIMEOUT 10000
+struct rockchip_data {
+ int size;
+ const char * const *clocks;
+ int num_clks;
+ nvmem_reg_read_t reg_read;
+};
+
struct rockchip_otp {
struct device *dev;
void __iomem *base;
- struct clk_bulk_data *clks;
- int num_clks;
+ struct clk_bulk_data *clks;
struct reset_control *rst;
-};
-
-/* list of required clocks */
-static const char * const rockchip_otp_clocks[] = {
- "otp", "apb_pclk", "phy",
-};
-
-struct rockchip_data {
- int size;
+ const struct rockchip_data *data;
};
static int rockchip_otp_reset(struct rockchip_otp *otp)
@@ -132,29 +130,23 @@ static int rockchip_otp_ecc_enable(struct rockchip_otp *otp, bool enable)
return ret;
}
-static int rockchip_otp_read(void *context, unsigned int offset,
- void *val, size_t bytes)
+static int px30_otp_read(void *context, unsigned int offset,
+ void *val, size_t bytes)
{
struct rockchip_otp *otp = context;
u8 *buf = val;
- int ret = 0;
-
- ret = clk_bulk_prepare_enable(otp->num_clks, otp->clks);
- if (ret < 0) {
- dev_err(otp->dev, "failed to prepare/enable clks\n");
- return ret;
- }
+ int ret;
ret = rockchip_otp_reset(otp);
if (ret) {
dev_err(otp->dev, "failed to reset otp phy\n");
- goto disable_clks;
+ return ret;
}
ret = rockchip_otp_ecc_enable(otp, false);
if (ret < 0) {
dev_err(otp->dev, "rockchip_otp_ecc_enable err\n");
- goto disable_clks;
+ return ret;
}
writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
@@ -174,8 +166,28 @@ static int rockchip_otp_read(void *context, unsigned int offset,
read_end:
writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
-disable_clks:
- clk_bulk_disable_unprepare(otp->num_clks, otp->clks);
+
+ return ret;
+}
+
+static int rockchip_otp_read(void *context, unsigned int offset,
+ void *val, size_t bytes)
+{
+ struct rockchip_otp *otp = context;
+ int ret;
+
+ if (!otp->data || !otp->data->reg_read)
+ return -EINVAL;
+
+ ret = clk_bulk_prepare_enable(otp->data->num_clks, otp->clks);
+ if (ret < 0) {
+ dev_err(otp->dev, "failed to prepare/enable clks\n");
+ return ret;
+ }
+
+ ret = otp->data->reg_read(context, offset, val, bytes);
+
+ clk_bulk_disable_unprepare(otp->data->num_clks, otp->clks);
return ret;
}
@@ -189,8 +201,15 @@ static struct nvmem_config otp_config = {
.reg_read = rockchip_otp_read,
};
+static const char * const px30_otp_clocks[] = {
+ "otp", "apb_pclk", "phy",
+};
+
static const struct rockchip_data px30_data = {
.size = 0x40,
+ .clocks = px30_otp_clocks,
+ .num_clks = ARRAY_SIZE(px30_otp_clocks),
+ .reg_read = px30_otp_read,
};
static const struct of_device_id rockchip_otp_match[] = {
@@ -225,21 +244,21 @@ static int rockchip_otp_probe(struct platform_device *pdev)
if (!otp)
return -ENOMEM;
+ otp->data = data;
otp->dev = dev;
otp->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(otp->base))
return PTR_ERR(otp->base);
- otp->num_clks = ARRAY_SIZE(rockchip_otp_clocks);
- otp->clks = devm_kcalloc(dev, otp->num_clks,
- sizeof(*otp->clks), GFP_KERNEL);
+ otp->clks = devm_kcalloc(dev, data->num_clks, sizeof(*otp->clks),
+ GFP_KERNEL);
if (!otp->clks)
return -ENOMEM;
- for (i = 0; i < otp->num_clks; ++i)
- otp->clks[i].id = rockchip_otp_clocks[i];
+ for (i = 0; i < data->num_clks; ++i)
+ otp->clks[i].id = data->clocks[i];
- ret = devm_clk_bulk_get(dev, otp->num_clks, otp->clks);
+ ret = devm_clk_bulk_get(dev, data->num_clks, otp->clks);
if (ret)
return ret;
--
2.40.0
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^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 3/8] nvmem: rockchip-otp: Add clocks and reg_read to rockchip_data
2023-05-01 8:43 ` [PATCH 3/8] nvmem: rockchip-otp: Add clocks and reg_read to rockchip_data Cristian Ciocaltea
@ 2023-05-02 8:47 ` Heiko Stübner
2023-05-02 12:49 ` Cristian Ciocaltea
0 siblings, 1 reply; 25+ messages in thread
From: Heiko Stübner @ 2023-05-02 8:47 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Philipp Zabel, Sebastian Reichel, Shreeya Patel, Kever Yang,
Finley Xiao, Cristian Ciocaltea
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Am Montag, 1. Mai 2023, 10:43:55 CEST schrieb Cristian Ciocaltea:
> In preparation to support new Rockchip OTP memory devices with different
> clock configurations and register layout, extend rockchip_data struct
> with the related members: clocks, num_clks, reg_read.
>
> Additionally, to avoid managing redundant driver data, drop num_clks
> member from rockchip_otp struct and update all references to point to
> the equivalent member in rockchip_data.
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
> drivers/nvmem/rockchip-otp.c | 79 ++++++++++++++++++++++--------------
> 1 file changed, 49 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c
> index 9f53bcce2f87..a5b234e60735 100644
> --- a/drivers/nvmem/rockchip-otp.c
> +++ b/drivers/nvmem/rockchip-otp.c
> @@ -54,21 +54,19 @@
>
> #define OTPC_TIMEOUT 10000
>
> +struct rockchip_data {
> + int size;
> + const char * const *clocks;
> + int num_clks;
nit: might be nice to use either "clocks" or "clks" as part for both names
other than that
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
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^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 3/8] nvmem: rockchip-otp: Add clocks and reg_read to rockchip_data
2023-05-02 8:47 ` Heiko Stübner
@ 2023-05-02 12:49 ` Cristian Ciocaltea
0 siblings, 0 replies; 25+ messages in thread
From: Cristian Ciocaltea @ 2023-05-02 12:49 UTC (permalink / raw)
To: Heiko Stübner, Srinivas Kandagatla, Rob Herring,
Krzysztof Kozlowski, Philipp Zabel, Sebastian Reichel,
Shreeya Patel, Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
On 5/2/23 11:47, Heiko Stübner wrote:
> Am Montag, 1. Mai 2023, 10:43:55 CEST schrieb Cristian Ciocaltea:
>> In preparation to support new Rockchip OTP memory devices with different
>> clock configurations and register layout, extend rockchip_data struct
>> with the related members: clocks, num_clks, reg_read.
>>
>> Additionally, to avoid managing redundant driver data, drop num_clks
>> member from rockchip_otp struct and update all references to point to
>> the equivalent member in rockchip_data.
>>
>> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
>> ---
>> drivers/nvmem/rockchip-otp.c | 79 ++++++++++++++++++++++--------------
>> 1 file changed, 49 insertions(+), 30 deletions(-)
>>
>> diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c
>> index 9f53bcce2f87..a5b234e60735 100644
>> --- a/drivers/nvmem/rockchip-otp.c
>> +++ b/drivers/nvmem/rockchip-otp.c
>> @@ -54,21 +54,19 @@
>>
>> #define OTPC_TIMEOUT 10000
>>
>> +struct rockchip_data {
>> + int size;
>> + const char * const *clocks;
>> + int num_clks;
>
> nit: might be nice to use either "clocks" or "clks" as part for both names
Indeed, will handle this in v2.
> other than that
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Thanks,
Cristian
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^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 4/8] nvmem: rockchip-otp: Generalize rockchip_otp_wait_status()
2023-05-01 8:43 [PATCH 0/8] Add RK3588 OTP memory support Cristian Ciocaltea
` (2 preceding siblings ...)
2023-05-01 8:43 ` [PATCH 3/8] nvmem: rockchip-otp: Add clocks and reg_read to rockchip_data Cristian Ciocaltea
@ 2023-05-01 8:43 ` Cristian Ciocaltea
2023-05-02 8:48 ` Heiko Stübner
2023-05-01 8:43 ` [PATCH 5/8] nvmem: rockchip-otp: Use devm_reset_control_array_get_exclusive() Cristian Ciocaltea
` (4 subsequent siblings)
8 siblings, 1 reply; 25+ messages in thread
From: Cristian Ciocaltea @ 2023-05-01 8:43 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Heiko Stuebner, Philipp Zabel, Sebastian Reichel, Shreeya Patel,
Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
In preparation to support additional Rockchip OTP memory devices with
different register layout, generalize rockchip_otp_wait_status() to
accept a new parameter for specifying the offset of the status register.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
drivers/nvmem/rockchip-otp.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c
index a5b234e60735..e308dd3b4eb1 100644
--- a/drivers/nvmem/rockchip-otp.c
+++ b/drivers/nvmem/rockchip-otp.c
@@ -90,18 +90,19 @@ static int rockchip_otp_reset(struct rockchip_otp *otp)
return 0;
}
-static int rockchip_otp_wait_status(struct rockchip_otp *otp, u32 flag)
+static int rockchip_otp_wait_status(struct rockchip_otp *otp,
+ unsigned int reg, u32 flag)
{
u32 status = 0;
int ret;
- ret = readl_poll_timeout_atomic(otp->base + OTPC_INT_STATUS, status,
+ ret = readl_poll_timeout_atomic(otp->base + reg, status,
(status & flag), 1, OTPC_TIMEOUT);
if (ret)
return ret;
/* clean int status */
- writel(flag, otp->base + OTPC_INT_STATUS);
+ writel(flag, otp->base + reg);
return 0;
}
@@ -123,7 +124,7 @@ static int rockchip_otp_ecc_enable(struct rockchip_otp *otp, bool enable)
writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL);
- ret = rockchip_otp_wait_status(otp, OTPC_SBPI_DONE);
+ ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_SBPI_DONE);
if (ret < 0)
dev_err(otp->dev, "timeout during ecc_enable\n");
@@ -156,7 +157,7 @@ static int px30_otp_read(void *context, unsigned int offset,
otp->base + OTPC_USER_ADDR);
writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
otp->base + OTPC_USER_ENABLE);
- ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE);
+ ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_USER_DONE);
if (ret < 0) {
dev_err(otp->dev, "timeout during read setup\n");
goto read_end;
--
2.40.0
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 4/8] nvmem: rockchip-otp: Generalize rockchip_otp_wait_status()
2023-05-01 8:43 ` [PATCH 4/8] nvmem: rockchip-otp: Generalize rockchip_otp_wait_status() Cristian Ciocaltea
@ 2023-05-02 8:48 ` Heiko Stübner
0 siblings, 0 replies; 25+ messages in thread
From: Heiko Stübner @ 2023-05-02 8:48 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Philipp Zabel, Sebastian Reichel, Shreeya Patel, Kever Yang,
Finley Xiao, Cristian Ciocaltea
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Am Montag, 1. Mai 2023, 10:43:56 CEST schrieb Cristian Ciocaltea:
> In preparation to support additional Rockchip OTP memory devices with
> different register layout, generalize rockchip_otp_wait_status() to
> accept a new parameter for specifying the offset of the status register.
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 5/8] nvmem: rockchip-otp: Use devm_reset_control_array_get_exclusive()
2023-05-01 8:43 [PATCH 0/8] Add RK3588 OTP memory support Cristian Ciocaltea
` (3 preceding siblings ...)
2023-05-01 8:43 ` [PATCH 4/8] nvmem: rockchip-otp: Generalize rockchip_otp_wait_status() Cristian Ciocaltea
@ 2023-05-01 8:43 ` Cristian Ciocaltea
2023-05-02 8:51 ` Heiko Stübner
2023-05-01 8:43 ` [PATCH 6/8] nvmem: rockchip-otp: Improve probe error handling Cristian Ciocaltea
` (3 subsequent siblings)
8 siblings, 1 reply; 25+ messages in thread
From: Cristian Ciocaltea @ 2023-05-01 8:43 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Heiko Stuebner, Philipp Zabel, Sebastian Reichel, Shreeya Patel,
Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
In preparation to support new Rockchip OTP memory devices having
specific reset configurations, switch devm_reset_control_get() to
devm_reset_control_array_get_exclusive().
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
drivers/nvmem/rockchip-otp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c
index e308dd3b4eb1..b74d98f82ae5 100644
--- a/drivers/nvmem/rockchip-otp.c
+++ b/drivers/nvmem/rockchip-otp.c
@@ -263,7 +263,7 @@ static int rockchip_otp_probe(struct platform_device *pdev)
if (ret)
return ret;
- otp->rst = devm_reset_control_get(dev, "phy");
+ otp->rst = devm_reset_control_array_get_exclusive(dev);
if (IS_ERR(otp->rst))
return PTR_ERR(otp->rst);
--
2.40.0
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 5/8] nvmem: rockchip-otp: Use devm_reset_control_array_get_exclusive()
2023-05-01 8:43 ` [PATCH 5/8] nvmem: rockchip-otp: Use devm_reset_control_array_get_exclusive() Cristian Ciocaltea
@ 2023-05-02 8:51 ` Heiko Stübner
0 siblings, 0 replies; 25+ messages in thread
From: Heiko Stübner @ 2023-05-02 8:51 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Philipp Zabel, Sebastian Reichel, Shreeya Patel, Kever Yang,
Finley Xiao, Cristian Ciocaltea
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Am Montag, 1. Mai 2023, 10:43:57 CEST schrieb Cristian Ciocaltea:
> In preparation to support new Rockchip OTP memory devices having
> specific reset configurations, switch devm_reset_control_get() to
> devm_reset_control_array_get_exclusive().
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 6/8] nvmem: rockchip-otp: Improve probe error handling
2023-05-01 8:43 [PATCH 0/8] Add RK3588 OTP memory support Cristian Ciocaltea
` (4 preceding siblings ...)
2023-05-01 8:43 ` [PATCH 5/8] nvmem: rockchip-otp: Use devm_reset_control_array_get_exclusive() Cristian Ciocaltea
@ 2023-05-01 8:43 ` Cristian Ciocaltea
2023-05-02 8:52 ` Heiko Stübner
2023-05-01 8:43 ` [PATCH 7/8] nvmem: rockchip-otp: Add support for RK3588 Cristian Ciocaltea
` (2 subsequent siblings)
8 siblings, 1 reply; 25+ messages in thread
From: Cristian Ciocaltea @ 2023-05-01 8:43 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Heiko Stuebner, Philipp Zabel, Sebastian Reichel, Shreeya Patel,
Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Enhance error handling in the probe function by making use of
dev_err_probe(), which ensures the error code is always printed, in
addition to the specified error message.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
drivers/nvmem/rockchip-otp.c | 21 ++++++++++++---------
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c
index b74d98f82ae5..4370d6c5e4e9 100644
--- a/drivers/nvmem/rockchip-otp.c
+++ b/drivers/nvmem/rockchip-otp.c
@@ -235,10 +235,8 @@ static int rockchip_otp_probe(struct platform_device *pdev)
int ret, i;
data = of_device_get_match_data(dev);
- if (!data) {
- dev_err(dev, "failed to get match data\n");
- return -EINVAL;
- }
+ if (!data)
+ return dev_err_probe(dev, -EINVAL, "failed to get match data\n");
otp = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_otp),
GFP_KERNEL);
@@ -249,7 +247,8 @@ static int rockchip_otp_probe(struct platform_device *pdev)
otp->dev = dev;
otp->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(otp->base))
- return PTR_ERR(otp->base);
+ return dev_err_probe(dev, PTR_ERR(otp->base),
+ "failed to ioremap resource\n");
otp->clks = devm_kcalloc(dev, data->num_clks, sizeof(*otp->clks),
GFP_KERNEL);
@@ -261,18 +260,22 @@ static int rockchip_otp_probe(struct platform_device *pdev)
ret = devm_clk_bulk_get(dev, data->num_clks, otp->clks);
if (ret)
- return ret;
+ return dev_err_probe(dev, ret, "failed to get clocks\n");
otp->rst = devm_reset_control_array_get_exclusive(dev);
if (IS_ERR(otp->rst))
- return PTR_ERR(otp->rst);
+ return dev_err_probe(dev, PTR_ERR(otp->rst),
+ "failed to get resets\n");
otp_config.size = data->size;
otp_config.priv = otp;
otp_config.dev = dev;
- nvmem = devm_nvmem_register(dev, &otp_config);
- return PTR_ERR_OR_ZERO(nvmem);
+ nvmem = devm_nvmem_register(dev, &otp_config);
+ if (IS_ERR(nvmem))
+ return dev_err_probe(dev, PTR_ERR(nvmem),
+ "failed to register nvmem device\n");
+ return 0;
}
static struct platform_driver rockchip_otp_driver = {
--
2.40.0
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 6/8] nvmem: rockchip-otp: Improve probe error handling
2023-05-01 8:43 ` [PATCH 6/8] nvmem: rockchip-otp: Improve probe error handling Cristian Ciocaltea
@ 2023-05-02 8:52 ` Heiko Stübner
0 siblings, 0 replies; 25+ messages in thread
From: Heiko Stübner @ 2023-05-02 8:52 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Philipp Zabel, Sebastian Reichel, Shreeya Patel, Kever Yang,
Finley Xiao, Cristian Ciocaltea
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Am Montag, 1. Mai 2023, 10:43:58 CEST schrieb Cristian Ciocaltea:
> Enhance error handling in the probe function by making use of
> dev_err_probe(), which ensures the error code is always printed, in
> addition to the specified error message.
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 7/8] nvmem: rockchip-otp: Add support for RK3588
2023-05-01 8:43 [PATCH 0/8] Add RK3588 OTP memory support Cristian Ciocaltea
` (5 preceding siblings ...)
2023-05-01 8:43 ` [PATCH 6/8] nvmem: rockchip-otp: Improve probe error handling Cristian Ciocaltea
@ 2023-05-01 8:43 ` Cristian Ciocaltea
2023-05-02 8:55 ` Heiko Stübner
2023-05-01 8:44 ` [PATCH 8/8] arm64: dts: rockchip: Add rk3588 OTP node Cristian Ciocaltea
2023-05-02 8:26 ` [PATCH 0/8] Add RK3588 OTP memory support Vincent Legoll
8 siblings, 1 reply; 25+ messages in thread
From: Cristian Ciocaltea @ 2023-05-01 8:43 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Heiko Stuebner, Philipp Zabel, Sebastian Reichel, Shreeya Patel,
Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Add support for the OTP memory device found on the Rockchip RK3588 SoC.
While here, remove the unnecessary 'void *' casts in the OF device ID
table.
Co-developed-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
drivers/nvmem/rockchip-otp.c | 78 +++++++++++++++++++++++++++++++++++-
1 file changed, 76 insertions(+), 2 deletions(-)
diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c
index 4370d6c5e4e9..022691cadf94 100644
--- a/drivers/nvmem/rockchip-otp.c
+++ b/drivers/nvmem/rockchip-otp.c
@@ -54,6 +54,19 @@
#define OTPC_TIMEOUT 10000
+/* RK3588 Register */
+#define RK3588_OTPC_AUTO_CTRL 0x04
+#define RK3588_OTPC_AUTO_EN 0x08
+#define RK3588_OTPC_INT_ST 0x84
+#define RK3588_OTPC_DOUT0 0x20
+#define RK3588_NO_SECURE_OFFSET 0x300
+#define RK3588_NBYTES 4
+#define RK3588_BURST_NUM 1
+#define RK3588_BURST_SHIFT 8
+#define RK3588_ADDR_SHIFT 16
+#define RK3588_AUTO_EN BIT(0)
+#define RK3588_RD_DONE BIT(1)
+
struct rockchip_data {
int size;
const char * const *clocks;
@@ -171,6 +184,52 @@ static int px30_otp_read(void *context, unsigned int offset,
return ret;
}
+static int rk3588_otp_read(void *context, unsigned int offset,
+ void *val, size_t bytes)
+{
+ struct rockchip_otp *otp = context;
+ unsigned int addr_start, addr_end, addr_len;
+ int ret, i = 0;
+ u32 data;
+ u8 *buf;
+
+ addr_start = round_down(offset, RK3588_NBYTES) / RK3588_NBYTES;
+ addr_end = round_up(offset + bytes, RK3588_NBYTES) / RK3588_NBYTES;
+ addr_len = addr_end - addr_start;
+ addr_start += RK3588_NO_SECURE_OFFSET;
+
+ buf = kzalloc(array_size(addr_len, RK3588_NBYTES), GFP_KERNEL);
+ if (!buf)
+ return -ENOMEM;
+
+ while (addr_len--) {
+ writel((addr_start << RK3588_ADDR_SHIFT) |
+ (RK3588_BURST_NUM << RK3588_BURST_SHIFT),
+ otp->base + RK3588_OTPC_AUTO_CTRL);
+ writel(RK3588_AUTO_EN, otp->base + RK3588_OTPC_AUTO_EN);
+
+ ret = rockchip_otp_wait_status(otp, RK3588_OTPC_INT_ST,
+ RK3588_RD_DONE);
+ if (ret < 0) {
+ dev_err(otp->dev, "timeout during read setup\n");
+ goto read_end;
+ }
+
+ data = readl(otp->base + RK3588_OTPC_DOUT0);
+ memcpy(&buf[i], &data, RK3588_NBYTES);
+
+ i += RK3588_NBYTES;
+ addr_start++;
+ }
+
+ memcpy(val, buf + offset % RK3588_NBYTES, bytes);
+
+read_end:
+ kfree(buf);
+
+ return ret;
+}
+
static int rockchip_otp_read(void *context, unsigned int offset,
void *val, size_t bytes)
{
@@ -213,14 +272,29 @@ static const struct rockchip_data px30_data = {
.reg_read = px30_otp_read,
};
+static const char * const rk3588_otp_clocks[] = {
+ "otpc", "apb", "arb", "phy",
+};
+
+static const struct rockchip_data rk3588_data = {
+ .size = 0x400,
+ .clocks = rk3588_otp_clocks,
+ .num_clks = ARRAY_SIZE(rk3588_otp_clocks),
+ .reg_read = rk3588_otp_read,
+};
+
static const struct of_device_id rockchip_otp_match[] = {
{
.compatible = "rockchip,px30-otp",
- .data = (void *)&px30_data,
+ .data = &px30_data,
},
{
.compatible = "rockchip,rk3308-otp",
- .data = (void *)&px30_data,
+ .data = &px30_data,
+ },
+ {
+ .compatible = "rockchip,rk3588-otp",
+ .data = &rk3588_data,
},
{ /* sentinel */ },
};
--
2.40.0
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 7/8] nvmem: rockchip-otp: Add support for RK3588
2023-05-01 8:43 ` [PATCH 7/8] nvmem: rockchip-otp: Add support for RK3588 Cristian Ciocaltea
@ 2023-05-02 8:55 ` Heiko Stübner
0 siblings, 0 replies; 25+ messages in thread
From: Heiko Stübner @ 2023-05-02 8:55 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Philipp Zabel, Sebastian Reichel, Shreeya Patel, Kever Yang,
Finley Xiao, Cristian Ciocaltea
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Am Montag, 1. Mai 2023, 10:43:59 CEST schrieb Cristian Ciocaltea:
> Add support for the OTP memory device found on the Rockchip RK3588 SoC.
>
> While here, remove the unnecessary 'void *' casts in the OF device ID
> table.
>
> Co-developed-by: Finley Xiao <finley.xiao@rock-chips.com>
> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 8/8] arm64: dts: rockchip: Add rk3588 OTP node
2023-05-01 8:43 [PATCH 0/8] Add RK3588 OTP memory support Cristian Ciocaltea
` (6 preceding siblings ...)
2023-05-01 8:43 ` [PATCH 7/8] nvmem: rockchip-otp: Add support for RK3588 Cristian Ciocaltea
@ 2023-05-01 8:44 ` Cristian Ciocaltea
2023-05-02 8:57 ` Heiko Stübner
2023-05-02 8:26 ` [PATCH 0/8] Add RK3588 OTP memory support Vincent Legoll
8 siblings, 1 reply; 25+ messages in thread
From: Cristian Ciocaltea @ 2023-05-01 8:44 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Heiko Stuebner, Philipp Zabel, Sebastian Reichel, Shreeya Patel,
Kever Yang, Finley Xiao
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Add DT node for Rockchip RK3588/RK3588S OTP memory.
Co-developed-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 54 +++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 767084a1ec43..0abcd51d7d66 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1822,6 +1822,60 @@ spi4: spi@fecb0000 {
status = "disabled";
};
+ otp: efuse@fecc0000 {
+ compatible = "rockchip,rk3588-otp";
+ reg = <0x0 0xfecc0000 0x0 0x400>;
+ clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>,
+ <&cru CLK_OTPC_ARB>, <&cru CLK_OTP_PHY_G>;
+ clock-names = "otpc", "apb", "arb", "phy";
+ resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>,
+ <&cru SRST_OTPC_ARB>;
+ reset-names = "otpc", "apb", "arb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpu_code: cpu-code@2 {
+ reg = <0x02 0x2>;
+ };
+
+ otp_id: id@7 {
+ reg = <0x07 0x10>;
+ };
+
+ otp_cpu_version: cpu-version@1c {
+ reg = <0x1c 0x1>;
+ bits = <3 3>;
+ };
+
+ cpub0_leakage: cpu-leakage@17 {
+ reg = <0x17 0x1>;
+ };
+
+ cpub1_leakage: cpu-leakage@18 {
+ reg = <0x18 0x1>;
+ };
+
+ cpul_leakage: cpu-leakage@19 {
+ reg = <0x19 0x1>;
+ };
+
+ log_leakage: log-leakage@1a {
+ reg = <0x1a 0x1>;
+ };
+
+ gpu_leakage: gpu-leakage@1b {
+ reg = <0x1b 0x1>;
+ };
+
+ npu_leakage: npu-leakage@28 {
+ reg = <0x28 0x1>;
+ };
+
+ codec_leakage: codec-leakage@29 {
+ reg = <0x29 0x1>;
+ };
+ };
+
dmac2: dma-controller@fed10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x0 0xfed10000 0x0 0x4000>;
--
2.40.0
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^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 8/8] arm64: dts: rockchip: Add rk3588 OTP node
2023-05-01 8:44 ` [PATCH 8/8] arm64: dts: rockchip: Add rk3588 OTP node Cristian Ciocaltea
@ 2023-05-02 8:57 ` Heiko Stübner
0 siblings, 0 replies; 25+ messages in thread
From: Heiko Stübner @ 2023-05-02 8:57 UTC (permalink / raw)
To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Philipp Zabel, Sebastian Reichel, Shreeya Patel, Kever Yang,
Finley Xiao, Cristian Ciocaltea
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
kernel
Am Montag, 1. Mai 2023, 10:44:00 CEST schrieb Cristian Ciocaltea:
> Add DT node for Rockchip RK3588/RK3588S OTP memory.
>
> Co-developed-by: Finley Xiao <finley.xiao@rock-chips.com>
> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
looks good and I'll pick this up once the code and binding parts land.
Thanks
Heiko
> ---
> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 54 +++++++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> index 767084a1ec43..0abcd51d7d66 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> @@ -1822,6 +1822,60 @@ spi4: spi@fecb0000 {
> status = "disabled";
> };
>
> + otp: efuse@fecc0000 {
> + compatible = "rockchip,rk3588-otp";
> + reg = <0x0 0xfecc0000 0x0 0x400>;
> + clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>,
> + <&cru CLK_OTPC_ARB>, <&cru CLK_OTP_PHY_G>;
> + clock-names = "otpc", "apb", "arb", "phy";
> + resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>,
> + <&cru SRST_OTPC_ARB>;
> + reset-names = "otpc", "apb", "arb";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpu_code: cpu-code@2 {
> + reg = <0x02 0x2>;
> + };
> +
> + otp_id: id@7 {
> + reg = <0x07 0x10>;
> + };
> +
> + otp_cpu_version: cpu-version@1c {
> + reg = <0x1c 0x1>;
> + bits = <3 3>;
> + };
> +
> + cpub0_leakage: cpu-leakage@17 {
> + reg = <0x17 0x1>;
> + };
> +
> + cpub1_leakage: cpu-leakage@18 {
> + reg = <0x18 0x1>;
> + };
> +
> + cpul_leakage: cpu-leakage@19 {
> + reg = <0x19 0x1>;
> + };
> +
> + log_leakage: log-leakage@1a {
> + reg = <0x1a 0x1>;
> + };
> +
> + gpu_leakage: gpu-leakage@1b {
> + reg = <0x1b 0x1>;
> + };
> +
> + npu_leakage: npu-leakage@28 {
> + reg = <0x28 0x1>;
> + };
> +
> + codec_leakage: codec-leakage@29 {
> + reg = <0x29 0x1>;
> + };
> + };
> +
> dmac2: dma-controller@fed10000 {
> compatible = "arm,pl330", "arm,primecell";
> reg = <0x0 0xfed10000 0x0 0x4000>;
>
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 0/8] Add RK3588 OTP memory support
2023-05-01 8:43 [PATCH 0/8] Add RK3588 OTP memory support Cristian Ciocaltea
` (7 preceding siblings ...)
2023-05-01 8:44 ` [PATCH 8/8] arm64: dts: rockchip: Add rk3588 OTP node Cristian Ciocaltea
@ 2023-05-02 8:26 ` Vincent Legoll
2023-05-02 12:40 ` Cristian Ciocaltea
8 siblings, 1 reply; 25+ messages in thread
From: Vincent Legoll @ 2023-05-02 8:26 UTC (permalink / raw)
To: Cristian Ciocaltea
Cc: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Heiko Stuebner, Philipp Zabel, Sebastian Reichel, Shreeya Patel,
Kever Yang, Finley Xiao, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel, kernel
Hello,
On Mon, May 1, 2023 at 8:44 AM Cristian Ciocaltea
<cristian.ciocaltea@collabora.com> wrote:
> This patch series adds OTP memory support for Rockchip RK3588 SoC,
> while also providing a few improvements to the existing rockchip-otp
> driver, in addition to converting the bindings to dt-schema.
I tested this on a QuartzPro64 dev board, I applied your series top of my tree:
Collabora's rk3588-v6.3 + some DT patches to add support for the qp64 board.
Here is the output from the commands you told me to try:
# ls -1 /sys/bus/nvmem/devices/*/nvmem
/sys/bus/nvmem/devices/rockchip-otp0/nvmem
# od -N 64 -A x -t x1z -v /sys/bus/nvmem/devices/rockchip-otp0/nvmem
000000 52 4b 35 88 91 fe 21 41 5a 43 39 36 00 00 00 00 >RK5...!AZC96....<
000010 00 00 00 00 0f 0b 0d 0a 0a 0c 25 0e 00 00 00 00 >..........%.....<
000020 00 00 00 00 00 00 00 00 08 0c 00 00 00 00 00 00 >................<
000030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
000040
This is working as expected.
You can add my T-B, for the whole series:
Tested-by: Vincent Legoll <vincent.legoll@gmail.com>
Regards
--
Vincent Legoll
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^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 0/8] Add RK3588 OTP memory support
2023-05-02 8:26 ` [PATCH 0/8] Add RK3588 OTP memory support Vincent Legoll
@ 2023-05-02 12:40 ` Cristian Ciocaltea
0 siblings, 0 replies; 25+ messages in thread
From: Cristian Ciocaltea @ 2023-05-02 12:40 UTC (permalink / raw)
To: Vincent Legoll
Cc: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Heiko Stuebner, Philipp Zabel, Sebastian Reichel, Shreeya Patel,
Kever Yang, Finley Xiao, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel, kernel
On 5/2/23 11:26, Vincent Legoll wrote:
> Hello,
>
> On Mon, May 1, 2023 at 8:44 AM Cristian Ciocaltea
> <cristian.ciocaltea@collabora.com> wrote:
>> This patch series adds OTP memory support for Rockchip RK3588 SoC,
>> while also providing a few improvements to the existing rockchip-otp
>> driver, in addition to converting the bindings to dt-schema.
>
> I tested this on a QuartzPro64 dev board, I applied your series top of my tree:
> Collabora's rk3588-v6.3 + some DT patches to add support for the qp64 board.
>
> Here is the output from the commands you told me to try:
>
> # ls -1 /sys/bus/nvmem/devices/*/nvmem
> /sys/bus/nvmem/devices/rockchip-otp0/nvmem
>
> # od -N 64 -A x -t x1z -v /sys/bus/nvmem/devices/rockchip-otp0/nvmem
> 000000 52 4b 35 88 91 fe 21 41 5a 43 39 36 00 00 00 00 >RK5...!AZC96....<
> 000010 00 00 00 00 0f 0b 0d 0a 0a 0c 25 0e 00 00 00 00 >..........%.....<
> 000020 00 00 00 00 00 00 00 00 08 0c 00 00 00 00 00 00 >................<
> 000030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >................<
> 000040
>
> This is working as expected.
>
> You can add my T-B, for the whole series:
>
> Tested-by: Vincent Legoll <vincent.legoll@gmail.com>
Thanks for testing!
Regards,
Cristian
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^ permalink raw reply [flat|nested] 25+ messages in thread