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From: Oliver Upton To: kvm@vger.kernel.org, Marc Zyngier , kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Oliver Upton , Christoffer Dall , Suzuki K Poulose , Alexandru Elisei , James Morse , Joey Gouly , Ganapatrao Kulkarni , Zenghui Yu Subject: Re: [PATCH v3 00/16] KVM: arm64: nv: Shadow stage-2 page table handling Date: Wed, 19 Jun 2024 08:41:44 +0000 Message-ID: <171878647493.242213.9111337124987897859.b4-ty@linux.dev> In-Reply-To: <20240614144552.2773592-1-maz@kernel.org> References: <20240614144552.2773592-1-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240619_014202_198948_C914B367 X-CRM114-Status: UNSURE ( 7.08 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 14 Jun 2024 15:45:36 +0100, Marc Zyngier wrote: > Here's the thurd version of the shadow stage-2 handling for NV > support on arm64. > > * From v2 [2] > > - Simplified the S2 walker by dropping a bunch of redundant > fields from the walker info structure > > [...] Applied to kvmarm/next, thanks! [01/16] KVM: arm64: nv: Support multiple nested Stage-2 mmu structures https://git.kernel.org/kvmarm/kvmarm/c/4f128f8e1aaa [02/16] KVM: arm64: nv: Implement nested Stage-2 page table walk logic https://git.kernel.org/kvmarm/kvmarm/c/61e30b9eef7f [03/16] KVM: arm64: nv: Handle shadow stage 2 page faults https://git.kernel.org/kvmarm/kvmarm/c/fd276e71d1e7 [04/16] KVM: arm64: nv: Unmap/flush shadow stage 2 page tables https://git.kernel.org/kvmarm/kvmarm/c/ec14c272408a [05/16] KVM: arm64: nv: Add Stage-1 EL2 invalidation primitives https://git.kernel.org/kvmarm/kvmarm/c/82e86326ec58 [06/16] KVM: arm64: nv: Handle EL2 Stage-1 TLB invalidation https://git.kernel.org/kvmarm/kvmarm/c/67fda56e76da [07/16] KVM: arm64: nv: Handle TLB invalidation targeting L2 stage-1 https://git.kernel.org/kvmarm/kvmarm/c/8e236efa4cd2 [08/16] KVM: arm64: nv: Handle TLBI VMALLS12E1{,IS} operations https://git.kernel.org/kvmarm/kvmarm/c/e6c9a3015ff2 [09/16] KVM: arm64: nv: Handle TLBI ALLE1{,IS} operations https://git.kernel.org/kvmarm/kvmarm/c/5cfb6cec62f2 [10/16] KVM: arm64: nv: Handle TLBI IPAS2E1{,IS} operations https://git.kernel.org/kvmarm/kvmarm/c/70109bcd701e [11/16] KVM: arm64: nv: Handle FEAT_TTL hinted TLB operations https://git.kernel.org/kvmarm/kvmarm/c/d1de1576dc21 [12/16] KVM: arm64: nv: Tag shadow S2 entries with guest's leaf S2 level https://git.kernel.org/kvmarm/kvmarm/c/b1a3a94812b9 [13/16] KVM: arm64: nv: Invalidate TLBs based on shadow S2 TTL-like information https://git.kernel.org/kvmarm/kvmarm/c/809b2e6013a5 [14/16] KVM: arm64: nv: Add handling of outer-shareable TLBI operations https://git.kernel.org/kvmarm/kvmarm/c/0cb8aae22676 [15/16] KVM: arm64: nv: Add handling of range-based TLBI operations https://git.kernel.org/kvmarm/kvmarm/c/5d476ca57d7d [16/16] KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations https://git.kernel.org/kvmarm/kvmarm/c/0feec7769a63 -- Best, Oliver