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Tue, 11 Nov 2025 08:04:59 -0600 Received: from [172.24.233.103] (uda0132425.dhcp.ti.com [172.24.233.103]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 5ABE4t2s1015636; Tue, 11 Nov 2025 08:04:56 -0600 Message-ID: <173b8b67-b077-4ec6-8bd6-1683ad28e2dc@ti.com> Date: Tue, 11 Nov 2025 19:33:21 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support To: Francesco Dolcini CC: Andrew Davis , Nishanth Menon , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Parth Pancholi , , , , "Emanuele Ghidoli" , Ernest Van Hoecke , =?UTF-8?Q?Jo=C3=A3o_Paulo_Gon=C3=A7alves?= , Francesco Dolcini References: <20251104144915.60445-1-francesco@dolcini.it> <20251104145240.61219-1-francesco@dolcini.it> <20251104145240.61219-2-francesco@dolcini.it> <20251105115335.GA14157@francesco-nb> <7024f4b3-00a0-4618-8bf9-53e305fcc982@ti.com> <20251106101932.GA5975@francesco-nb> <20251110094716.GA7356@francesco-nb> From: Vignesh Raghavendra Content-Language: en-US In-Reply-To: <20251110094716.GA7356@francesco-nb> Content-Type: text/plain; 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X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Nov 2025 14:05:03.4709 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 74a94032-a0ba-43be-89ed-08de212b4f92 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.21.194];Helo=[flwvzet200.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023CF.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR10MB4332 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251111_060513_554741_A99FD6A9 X-CRM114-Status: GOOD ( 32.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10/11/25 15:17, Francesco Dolcini wrote: > Hi Vignesh, > > On Mon, Nov 10, 2025 at 10:06:58AM +0530, Vignesh Raghavendra wrote: >> On 06/11/25 15:49, Francesco Dolcini wrote: >>>>> Yes, known. Is this an issue? >>>>> >>>>> This node must be disabled, no matter what is present in any included >>>>> dtsi file, it's a deliberate decision. >>>>> >>>>> This dtsi file describes a SoM, the used pins/functions are defined on >>>>> the pinout, but this node cannot be enabled unless the SoM is mated with >>>>> a carrier board that is exposing it. >>>> Same as my point above, you shouldn't enable nodes that are not used >>>> or have anything attached. The SoM only has some edge connectors so >>>> it should not be enabled at the SoM level, that we seem to agree, but >>>> the carrier board doesn't connect those lines to anything either. They >>>> just run to a pin header with nothing attached, how is that header >>>> any different than the pins on the edge of the SoM? >>> You are commenting something unrelated here, or I am not understanding >>> you. >>> >>> You commented that the status = "disabled" is redundant. We both agree >>> that this node needs to be disabled in the SoM dtsi, and it is already >>> like that. >>> >>> I would prefer to keep the redundant "disabled", because I see value on >>> not having to rely on what is done on any included dtsi, where the >>> original node is defined. >> >> >> One can always reverse compile the DTB to see if a node is enabled or not. > > Sure. My reason for having it explicitly disabled here is not to have to > depend on anything that is happening on the included dtsi on this > regard, given that we really want those disabled in the SoM. > > See for example https://lore.kernel.org/all/20251015111344.3639415-1-s-vadapalli@ti.com/ > where you can see that our verdin am62 was not impacted by this change > at all. > > To me this is just a benefit, without any drawback. > >>> I see this as a common pattern in multiple >>> dts/dtsi file and is what I would prefer to have (and I do not see any >>> kind of maintenance overhead on having it nor this being in conflict >>> with dts-coding-style.rst). >> >> I cannot seem to find any precedence to such a pattern (adding status = >> "disabled" for nodes that are already disabled at SoC level dtsi.) Could >> you point me to some? > > Just a couple of examples, you can easily find more if needed > > k3-am62-verdin.dtsi:&main_spi1 > nxp/imx/imx6qdl-phytec-phycore-som.dtsi:&fec > > >>> Vignesh, Nishanth, what is your expectation on this redundant >>> `status = "disabled"` property? >>> >> >> Assuming such pattern exists, please add a note in the commit message in >> the next version. > > With that said, it's a small thing, if you prefer me to change it just > let me know and I'll send a v2 with this changed. > > Vignesh: do you prefer a v2 with a mention in the commit message on the > `disabled` node, or that I just get rid of those? Anything else that you > spotted on this patch and that should be changed? > Please send v2 with line added in commit message. PS: I fully except someone to send a patch cleaning up all the double disables without knowing the background :) > Francesco > -- Regards Vignesh https://ti.com/opensource