From: Stephen Boyd <sboyd@kernel.org>
To: Rohit Visavalia <rohit.visavalia@amd.com>,
michal.simek@amd.com, mturquette@baylibre.com,
vishal.sagar@amd.com
Cc: javier.carrasco.cruz@gmail.com, geert+renesas@glider.be,
u.kleine-koenig@baylibre.com, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Rohit Visavalia <rohit.visavalia@amd.com>
Subject: Re: [PATCH v3 2/2] clk: xilinx: vcu: Update vcu init/reset sequence
Date: Sat, 21 Jun 2025 14:52:51 -0700 [thread overview]
Message-ID: <175054277123.4372.1455513715429068984@lazor> (raw)
In-Reply-To: <20250210113614.4149050-3-rohit.visavalia@amd.com>
Quoting Rohit Visavalia (2025-02-10 03:36:14)
> Updated vcu init/reset sequence as per design changes.
> If VCU reset GPIO is available then do assert and de-assert it before
> enabling/disabling gasket isolation.
> This GPIO is added because gasket isolation will be removed during startup
> that requires access to SLCR register space. Post startup, the ownership of
> the register interface lies with logiCORE IP.
>
> Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com>
> ---
Applied to clk-next
next prev parent reply other threads:[~2025-06-21 21:57 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-10 11:36 [PATCH v3 0/2] clk: xilinx: vcu: Sequence update and call trace fix Rohit Visavalia
2025-02-10 11:36 ` [PATCH v3 1/2] clk: xilinx: vcu: unregister pll_post only if registered correctly Rohit Visavalia
2025-06-21 21:52 ` Stephen Boyd
2025-02-10 11:36 ` [PATCH v3 2/2] clk: xilinx: vcu: Update vcu init/reset sequence Rohit Visavalia
2025-06-21 21:52 ` Stephen Boyd [this message]
2025-03-13 6:36 ` [PATCH v3 0/2] clk: xilinx: vcu: Sequence update and call trace fix Visavalia, Rohit
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