From: Krzysztof Kozlowski <krzk@kernel.org>
To: joakim.zhang@cixtech.com, mturquette@baylibre.com,
sboyd@kernel.org, bmasney@redhat.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, p.zabel@pengutronix.de,
gary.yang@cixtech.com
Cc: cix-kernel-upstream@cixtech.com, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 1/5] dt-bindings: soc: cix,sky1-system-control: add audss system control
Date: Fri, 5 Jun 2026 11:18:23 +0200 [thread overview]
Message-ID: <17528d9a-738c-48fe-ac24-b8d90875a74f@kernel.org> (raw)
In-Reply-To: <20260605032225.523669-2-joakim.zhang@cixtech.com>
On 05/06/2026 05:22, joakim.zhang@cixtech.com wrote:
> compatible:
> - items:
> - - enum:
> - - cix,sky1-system-control
> - - cix,sky1-s5-system-control
> - - const: syscon
> + oneOf:
> + - items:
> + - enum:
> + - cix,sky1-system-control
> + - cix,sky1-s5-system-control
> + - const: syscon
> + - items:
> + - const: cix,sky1-audss-system-control
> + - const: simple-mfd
> + - const: syscon
>
> reg:
> maxItems: 1
> @@ -27,6 +32,11 @@ properties:
> '#reset-cells':
> const: 1
>
> + clock-controller:
> + $ref: /schemas/clock/cix,sky1-audss-clock.yaml#
> + description:
> + AUDSS internal clock provider (cix,sky1-audss-system-control only).
Are you sure this patch builds? Your cover letter should explain merging
dependencies/strategy/constraints in the first chapter. You start with
THE MOST important information.
You need to disallow node for other variants.
> +
> required:
> - compatible
> - reg
> @@ -40,3 +50,22 @@ examples:
> reg = <0x4160000 0x100>;
> #reset-cells = <1>;
> };
> + - |
> + #include <dt-bindings/reset/cix,sky1-audss-system-control.h>
> +
> + audss_syscon: system-controller@7110000 {
> + compatible = "cix,sky1-audss-system-control", "simple-mfd", "syscon";
> + reg = <0x7110000 0x10000>;
> + #reset-cells = <1>;
> +
> + clock-controller {
> + compatible = "cix,sky1-audss-clock";
> + power-domains = <&smc_devpd 0>;
> + #clock-cells = <1>;
> + clocks = <&scmi_clk 0>, <&scmi_clk 1>, <&scmi_clk 2>,
> + <&scmi_clk 3>, <&scmi_clk 4>, <&scmi_clk 5>;
> + clock-names = "audio_clk0", "audio_clk1", "audio_clk2",
> + "audio_clk3", "audio_clk4", "audio_clk5";
> + resets = <&src 0>;
> + };
> + };
> diff --git a/include/dt-bindings/reset/cix,sky1-audss-system-control.h b/include/dt-bindings/reset/cix,sky1-audss-system-control.h
> new file mode 100644
> index 000000000000..2ebc5c4f10cd
> --- /dev/null
> +++ b/include/dt-bindings/reset/cix,sky1-audss-system-control.h
> @@ -0,0 +1,27 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
> +/*
> + * Copyright 2026 Cix Technology Group Co., Ltd.
> + */
> +#ifndef DT_BINDING_RESET_CIX_SKY1_AUDSS_SYSTEM_CONTROL_H
> +#define DT_BINDING_RESET_CIX_SKY1_AUDSS_SYSTEM_CONTROL_H
> +
> +#define AUDSS_I2S0_SW_RST_N 0
Most likely _N is redundant here. Consumers will ignore it completely
and this is binding used by consumers, not by reset controller.
> +#define AUDSS_I2S1_SW_RST_N 1
> +#define AUDSS_I2S2_SW_RST_N 2
> +#define AUDSS_I2S3_SW_RST_N 3
> +#define AUDSS_I2S4_SW_RST_N 4
> +#define AUDSS_I2S5_SW_RST_N 5
> +#define AUDSS_I2S6_SW_RST_N 6
> +#define AUDSS_I2S7_SW_RST_N 7
> +#define AUDSS_I2S8_SW_RST_N 8
> +#define AUDSS_I2S9_SW_RST_N 9
> +#define AUDSS_WDT_SW_RST_N 10
> +#define AUDSS_TIMER_SW_RST_N 11
> +#define AUDSS_MB0_SW_RST_N 12
> +#define AUDSS_MB1_SW_RST_N 13
> +#define AUDSS_HDA_SW_RST_N 14
> +#define AUDSS_DMAC_SW_RST_N 15
> +
> +#define SKY1_AUDSS_SW_RESET_NUM 16
Drop, not a binding.
> +
> +#endif
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-06-05 9:18 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-05 3:22 [PATCH v2 0/5] Add Cix Sky1 AUDSS clock and reset support joakim.zhang
2026-06-05 3:22 ` [PATCH v2 1/5] dt-bindings: soc: cix,sky1-system-control: add audss system control joakim.zhang
2026-06-05 4:40 ` Rob Herring (Arm)
2026-06-05 9:18 ` Krzysztof Kozlowski [this message]
2026-06-05 9:21 ` Krzysztof Kozlowski
2026-06-09 6:25 ` Joakim Zhang
2026-06-09 6:25 ` Joakim Zhang
2026-06-09 6:44 ` Krzysztof Kozlowski
2026-06-05 3:22 ` [PATCH v2 2/5] reset: cix: add audss support to sky1 reset driver joakim.zhang
2026-06-05 3:22 ` [PATCH v2 3/5] dt-bindings: clock: cix,sky1-audss-clock: add audss clock controller joakim.zhang
2026-06-05 9:24 ` Krzysztof Kozlowski
2026-06-09 6:27 ` Joakim Zhang
2026-06-05 3:22 ` [PATCH v2 4/5] clk: cix: add sky1 " joakim.zhang
2026-06-05 7:42 ` Philipp Zabel
2026-06-05 3:22 ` [PATCH v2 5/5] arm64: dts: cix: sky1: add audss system control joakim.zhang
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