[PATCH v5 0/6] rockchip: power-domain: fix pm domain for support RK3399 SoC

[PATCH v5 0/6] rockchip: power-domain: fix pm domain for support RK3399 SoC

[Elaine Zhang]

fix some idle handling
support sub-power domain
add rk3399-power.h
modify document for RK3399 Soc
modify power domain for RK3399 SoC

Changes in v5:
[PATCH v5 3/6]:fix up some coding style
[PATCH v5 5/6]:fix up some coding style

Elaine Zhang (6):
  rockchip: power-domain: make idle handling optional
  power-domain: allow domains only handling idle requests
  rockchip: power-domain: add support for sub-power domains
  dt/bindings: power: add RK3399 SoCs header for power-domain
  dt/bindings: rockchip: modify document of Rockchip power domains
  rockchip: power-domain: Modify power domain driver for rk3399

 .../bindings/soc/rockchip/power_domain.txt         |  37 ++++++
 drivers/soc/rockchip/pm_domains.c                  | 139 ++++++++++++++++++++-
 include/dt-bindings/power/rk3399-power.h           |  53 ++++++++
 3 files changed, 224 insertions(+), 5 deletions(-)
 create mode 100644 include/dt-bindings/power/rk3399-power.h

-- 
1.9.1

[PATCH v5 1/6] rockchip: power-domain: make idle handling optional

[Elaine Zhang]

Not all new socs need to handle idle states on domain state changes,
so add the possibility to make them optional.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/soc/rockchip/pm_domains.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index 18aee6b..c46312d 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -68,9 +68,9 @@ struct rockchip_pmu {
 {						\
 	.pwr_mask = BIT(pwr),			\
 	.status_mask = BIT(status),		\
-	.req_mask = BIT(req),			\
-	.idle_mask = BIT(idle),			\
-	.ack_mask = BIT(ack),			\
+	.req_mask = (req >= 0) ? BIT(req) : 0,		\
+	.idle_mask = (idle >= 0) ? BIT(idle) : 0,	\
+	.ack_mask = (ack >= 0) ? BIT(ack) : 0,		\
 }
 
 #define DOMAIN_RK3288(pwr, status, req)		\
@@ -96,6 +96,9 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
 	struct rockchip_pmu *pmu = pd->pmu;
 	unsigned int val;
 
+	if (pd_info->req_mask == 0)
+		return 0;
+
 	regmap_update_bits(pmu->regmap, pmu->info->req_offset,
 			   pd_info->req_mask, idle ? -1U : 0);
 
-- 
1.9.1

[PATCH v5 2/6] power-domain: allow domains only handling idle requests

[Elaine Zhang]

On some Rockchip SoC there exist child-domains only handling their
idle state with the actual power-state handled by a parent-domain.

So allow such types of domains. For them, we can determine their
state (on/of) by checking the inverse idle-state instead.

There exist one special case if both idle as well power handling
were set as not present, but as the domain-data is defined in the
code itself, we can expect the reasonable developer to define them

So allow such types of domains. For them, we can determine their
state (on/of) by checking the inverse idle-state instead.

There exist one special case if both idle as well power handling
were set as not present, but as the domain-data is defined in the
code itself, we can expect the reasonable developer to define them
in a correct, without adding more checks.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/soc/rockchip/pm_domains.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index c46312d..0465a06 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -66,8 +66,8 @@ struct rockchip_pmu {
 
 #define DOMAIN(pwr, status, req, idle, ack)	\
 {						\
-	.pwr_mask = BIT(pwr),			\
-	.status_mask = BIT(status),		\
+	.pwr_mask = (pwr >= 0) ? BIT(pwr) : 0,		\
+	.status_mask = (status >= 0) ? BIT(status) : 0,	\
 	.req_mask = (req >= 0) ? BIT(req) : 0,		\
 	.idle_mask = (idle >= 0) ? BIT(idle) : 0,	\
 	.ack_mask = (ack >= 0) ? BIT(ack) : 0,		\
@@ -119,6 +119,10 @@ static bool rockchip_pmu_domain_is_on(struct rockchip_pm_domain *pd)
 	struct rockchip_pmu *pmu = pd->pmu;
 	unsigned int val;
 
+	/* check idle status for idle-only domains */
+	if (pd->info->status_mask == 0)
+		return !rockchip_pmu_domain_is_idle(pd);
+
 	regmap_read(pmu->regmap, pmu->info->status_offset, &val);
 
 	/* 1'b0: power on, 1'b1: power off */
@@ -130,6 +134,9 @@ static void rockchip_do_pmu_set_power_domain(struct rockchip_pm_domain *pd,
 {
 	struct rockchip_pmu *pmu = pd->pmu;
 
+	if (pd->info->pwr_mask == 0)
+		return;
+
 	regmap_update_bits(pmu->regmap, pmu->info->pwr_offset,
 			   pd->info->pwr_mask, on ? 0 : -1U);
 
-- 
1.9.1

[PATCH v5 3/6] rockchip: power-domain: add support for sub-power domains

[Elaine Zhang]

This patch adds support for making one power domain a sub-domain of
other domain. This is useful for modeling power dependences,
which needs to have more than one power domain enabled to be operational.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/soc/rockchip/pm_domains.c | 64 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)

diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index 0465a06..1777e8e 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -370,6 +370,63 @@ static void rockchip_configure_pd_cnt(struct rockchip_pmu *pmu,
 	regmap_write(pmu->regmap, domain_reg_offset + 4, count);
 }
 
+static int rockchip_pm_add_subdomain(struct rockchip_pmu *pmu,
+				     struct device_node *parent)
+{
+	struct device_node *np;
+	struct generic_pm_domain *child_domain, *parent_domain;
+	int error;
+
+	for_each_child_of_node(parent, np) {
+		u32 idx = ~0;
+
+		if (of_property_read_u32(parent, "reg", &idx)) {
+			dev_err(pmu->dev,
+				"%s: failed to retrieve domain id (reg)\n",
+				parent->name);
+			goto err_out;
+		}
+		parent_domain = pmu->genpd_data.domains[idx];
+
+		error = rockchip_pm_add_one_domain(pmu, np);
+		if (error) {
+			dev_err(pmu->dev, "failed to handle node %s: %d\n",
+				np->name, error);
+			goto err_out;
+		}
+
+		if (of_property_read_u32(np, "reg", &idx)) {
+			dev_err(pmu->dev,
+				"%s: failed to retrieve domain id (reg)\n",
+				np->name);
+			goto err_out;
+		}
+		child_domain = pmu->genpd_data.domains[idx];
+
+		if (pm_genpd_add_subdomain(parent_domain, child_domain)) {
+			dev_err(pmu->dev, "%s failed to add subdomain: %s\n",
+				parent_domain->name, child_domain->name);
+			goto err_out;
+		} else {
+			dev_info(pmu->dev, "%s add subdomain: %s\n",
+				parent_domain->name, child_domain->name);
+		}
+
+		error = rockchip_pm_add_subdomain(pmu, np);
+		if (error < 0)
+			goto rm_sub_domain;
+	}
+	return 0;
+
+err_out:
+	of_node_put(parent);
+	of_node_put(np);
+	return -EINVAL;
+rm_sub_domain:
+	pm_genpd_remove_subdomain(parent_domain, child_domain);
+	return error;
+}
+
 static int rockchip_pm_domain_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -440,6 +497,13 @@ static int rockchip_pm_domain_probe(struct platform_device *pdev)
 			of_node_put(node);
 			goto err_out;
 		}
+
+		error = rockchip_pm_add_subdomain(pmu, node);
+		if (error < 0) {
+			dev_err(dev, "failed to handle subdomain node %s: %d\n",
+				node->name, error);
+			goto err_out;
+		}
 	}
 
 	if (error) {
-- 
1.9.1

[PATCH v5 4/6] dt/bindings: power: add RK3399 SoCs header for power-domain

[Elaine Zhang]

According to a description from TRM, add all the power domains

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 include/dt-bindings/power/rk3399-power.h | 53 ++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 include/dt-bindings/power/rk3399-power.h

diff --git a/include/dt-bindings/power/rk3399-power.h b/include/dt-bindings/power/rk3399-power.h
new file mode 100644
index 0000000..69fbd67
--- /dev/null
+++ b/include/dt-bindings/power/rk3399-power.h
@@ -0,0 +1,53 @@
+#ifndef __DT_BINDINGS_POWER_RK3399_POWER_H__
+#define __DT_BINDINGS_POWER_RK3399_POWER_H__
+
+/* VD_CORE_L */
+#define RK3399_PD_A53_L0	0
+#define RK3399_PD_A53_L1	1
+#define RK3399_PD_A53_L2	2
+#define RK3399_PD_A53_L3	3
+#define RK3399_PD_SCU_L		4
+
+/* VD_CORE_B */
+#define RK3399_PD_A72_B0	5
+#define RK3399_PD_A72_B1	6
+#define RK3399_PD_SCU_B		7
+
+/* VD_CENTER */
+#define RK3399_PD_CENTER	8
+#define RK3399_PD_VCODEC	9
+#define RK3399_PD_RGA		10
+#define RK3399_PD_IEP		11
+#define RK3399_PD_VDU		12
+
+/* VD_LOGIC */
+#define RK3399_PD_PERILP	13
+#define RK3399_PD_PERIHP	14
+#define RK3399_PD_VIO		15
+#define RK3399_PD_VO		16
+#define RK3399_PD_VOPB		17
+#define RK3399_PD_VOPL		18
+#define RK3399_PD_ISP0		19
+#define RK3399_PD_ISP1		20
+#define RK3399_PD_HDCP		21
+#define RK3399_PD_TCPD0		22
+#define RK3399_PD_TCPD1		23
+#define RK3399_PD_GIC		24
+#define RK3399_PD_ALIVE		25
+#define RK3399_PD_USB3		26
+#define RK3399_PD_SD		27
+#define RK3399_PD_CCI		28
+#define RK3399_PD_CCI0		29
+#define RK3399_PD_CCI1		30
+#define RK3399_PD_GMAC		31
+#define RK3399_PD_EMMC		32
+#define RK3399_PD_EDP		33
+#define RK3399_PD_SDIOAUDIO	34
+
+/* VD_GPU */
+#define RK3399_PD_GPU		35
+
+/* VD_PMU */
+#define RK3399_PD_PMU		36
+
+#endif
-- 
1.9.1

[PATCH v5 5/6] dt/bindings: rockchip: modify document of Rockchip power domains

[Elaine Zhang]

Add binding documentation for the power domains
found on Rockchip RK3399 SoCs.
RK3399 pd on/off not need to enable clk which in this pd.
So remove the clocks in the rk3399 pd example.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 .../bindings/soc/rockchip/power_domain.txt         | 37 ++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
index 13dc6a3..98085c8 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
@@ -7,6 +7,7 @@ Required properties for power domain controller:
 - compatible: Should be one of the following.
 	"rockchip,rk3288-power-controller" - for RK3288 SoCs.
 	"rockchip,rk3368-power-controller" - for RK3368 SoCs.
+	"rockchip,rk3399-power-controller" - for RK3399 SoCs.
 - #power-domain-cells: Number of cells in a power-domain specifier.
 	Should be 1 for multiple PM domains.
 - #address-cells: Should be 1.
@@ -16,6 +17,7 @@ Required properties for power domain sub nodes:
 - reg: index of the power domain, should use macros in:
 	"include/dt-bindings/power/rk3288-power.h" - for RK3288 type power domain.
 	"include/dt-bindings/power/rk3368-power.h" - for RK3368 type power domain.
+	"include/dt-bindings/power/rk3399-power.h" - for RK3399 type power domain.
 - clocks (optional): phandles to clocks which need to be enabled while power domain
 	switches state.
 
@@ -45,12 +47,41 @@ Example:
                 };
         };
 
+Example 2:
+		power: power-controller {
+			compatible = "rockchip,rk3399-power-controller";
+			#power-domain-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			pd_vio {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <RK3399_PD_VIO>;
+
+				pd_vo {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <RK3399_PD_VO>;
+
+					pd_vopb {
+						reg = <RK3399_PD_VOPB>;
+					};
+
+					pd_vopl {
+						reg = <RK3399_PD_VOPL>;
+					};
+				};
+			};
+		};
+
 Node of a device using power domains must have a power-domains property,
 containing a phandle to the power device node and an index specifying which
 power domain to use.
 The index should use macros in:
 	"include/dt-bindings/power/rk3288-power.h" - for rk3288 type power domain.
 	"include/dt-bindings/power/rk3368-power.h" - for rk3368 type power domain.
+	"include/dt-bindings/power/rk3399-power.h" - for rk3399 type power domain.
 
 Example of the node using power domain:
 
@@ -65,3 +96,9 @@ Example of the node using power domain:
                 power-domains = <&power RK3368_PD_GPU_1>;
                 /* ... */
         };
+
+	node {
+		/* ... */
+		power-domains = <&power RK3399_PD_VOPB>;
+		/* ... */
+	};
-- 
1.9.1

[PATCH v5 6/6] rockchip: power-domain: Modify power domain driver for rk3399

[Elaine Zhang]

This driver is modified to support RK3399 SoC.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/soc/rockchip/pm_domains.c | 55 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index 1777e8e..8cdd877 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -19,6 +19,7 @@
 #include <linux/mfd/syscon.h>
 #include <dt-bindings/power/rk3288-power.h>
 #include <dt-bindings/power/rk3368-power.h>
+#include <dt-bindings/power/rk3399-power.h>
 
 struct rockchip_domain_info {
 	int pwr_mask;
@@ -79,6 +80,9 @@ struct rockchip_pmu {
 #define DOMAIN_RK3368(pwr, status, req)		\
 	DOMAIN(pwr, status, req, (req) + 16, req)
 
+#define DOMAIN_RK3399(pwr, status, req)                \
+	DOMAIN(pwr, status, req, req, req)
+
 static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd)
 {
 	struct rockchip_pmu *pmu = pd->pmu;
@@ -535,6 +539,36 @@ static const struct rockchip_domain_info rk3368_pm_domains[] = {
 	[RK3368_PD_GPU_1]	= DOMAIN_RK3368(17, 16, 2),
 };
 
+static const struct rockchip_domain_info rk3399_pm_domains[] = {
+	[RK3399_PD_TCPD0]	= DOMAIN_RK3399(8, 8, -1),
+	[RK3399_PD_TCPD1]	= DOMAIN_RK3399(9, 9, -1),
+	[RK3399_PD_CCI]	= DOMAIN_RK3399(10, 10, -1),
+	[RK3399_PD_CCI0]	= DOMAIN_RK3399(-1, -1, 15),
+	[RK3399_PD_CCI1]	= DOMAIN_RK3399(-1, -1, 16),
+	[RK3399_PD_PERILP]	= DOMAIN_RK3399(11, 11, 1),
+	[RK3399_PD_PERIHP]	= DOMAIN_RK3399(12, 12, 2),
+	[RK3399_PD_CENTER]	= DOMAIN_RK3399(13, 13, 14),
+	[RK3399_PD_VIO]	= DOMAIN_RK3399(14, 14, 17),
+	[RK3399_PD_GPU]	= DOMAIN_RK3399(15, 15, 0),
+	[RK3399_PD_VCODEC]	= DOMAIN_RK3399(16, 16, 3),
+	[RK3399_PD_VDU]	= DOMAIN_RK3399(17, 17, 4),
+	[RK3399_PD_RGA]	= DOMAIN_RK3399(18, 18, 5),
+	[RK3399_PD_IEP]	= DOMAIN_RK3399(19, 19, 6),
+	[RK3399_PD_VO]	= DOMAIN_RK3399(20, 20, -1),
+	[RK3399_PD_VOPB]	= DOMAIN_RK3399(-1, -1, 7),
+	[RK3399_PD_VOPL]	= DOMAIN_RK3399(-1, -1, 8),
+	[RK3399_PD_ISP0]	= DOMAIN_RK3399(22, 22, 9),
+	[RK3399_PD_ISP1]	= DOMAIN_RK3399(23, 23, 10),
+	[RK3399_PD_HDCP]	= DOMAIN_RK3399(24, 24, 11),
+	[RK3399_PD_GMAC]	= DOMAIN_RK3399(25, 25, 23),
+	[RK3399_PD_EMMC]	= DOMAIN_RK3399(26, 26, 24),
+	[RK3399_PD_USB3]	= DOMAIN_RK3399(27, 27, 12),
+	[RK3399_PD_EDP]	= DOMAIN_RK3399(28, 28, 22),
+	[RK3399_PD_GIC]	= DOMAIN_RK3399(29, 29, 27),
+	[RK3399_PD_SD]	= DOMAIN_RK3399(30, 30, 28),
+	[RK3399_PD_SDIOAUDIO]	= DOMAIN_RK3399(31, 31, 29),
+};
+
 static const struct rockchip_pmu_info rk3288_pmu = {
 	.pwr_offset = 0x08,
 	.status_offset = 0x0c,
@@ -569,6 +603,23 @@ static const struct rockchip_pmu_info rk3368_pmu = {
 	.domain_info = rk3368_pm_domains,
 };
 
+static const struct rockchip_pmu_info rk3399_pmu = {
+	.pwr_offset = 0x14,
+	.status_offset = 0x18,
+	.req_offset = 0x60,
+	.idle_offset = 0x64,
+	.ack_offset = 0x68,
+
+	.core_pwrcnt_offset = 0x9c,
+	.gpu_pwrcnt_offset = 0xa4,
+
+	.core_power_transition_time = 24,
+	.gpu_power_transition_time = 24,
+
+	.num_domains = ARRAY_SIZE(rk3399_pm_domains),
+	.domain_info = rk3399_pm_domains,
+};
+
 static const struct of_device_id rockchip_pm_domain_dt_match[] = {
 	{
 		.compatible = "rockchip,rk3288-power-controller",
@@ -578,6 +629,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = {
 		.compatible = "rockchip,rk3368-power-controller",
 		.data = (void *)&rk3368_pmu,
 	},
+	{
+		.compatible = "rockchip,rk3399-power-controller",
+		.data = (void *)&rk3399_pmu,
+	},
 	{ /* sentinel */ },
 };
 
-- 
1.9.1

[PATCH v5 3/6] rockchip: power-domain: add support for sub-power domains

[Caesar Wang]

? 2016?03?03? 16:03, Elaine Zhang ??:
> This patch adds support for making one power domain a sub-domain of
> other domain. This is useful for modeling power dependences,
> which needs to have more than one power domain enabled to be operational.
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> ---
>   drivers/soc/rockchip/pm_domains.c | 64 +++++++++++++++++++++++++++++++++++++++
>   1 file changed, 64 insertions(+)
>
> diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
> index 0465a06..1777e8e 100644
> --- a/drivers/soc/rockchip/pm_domains.c
> +++ b/drivers/soc/rockchip/pm_domains.c
> @@ -370,6 +370,63 @@ static void rockchip_configure_pd_cnt(struct rockchip_pmu *pmu,
>   	regmap_write(pmu->regmap, domain_reg_offset + 4, count);
>   }
>   
> +static int rockchip_pm_add_subdomain(struct rockchip_pmu *pmu,
> +				     struct device_node *parent)
> +{
[...]
> +		child_domain = pmu->genpd_data.domains[idx];
> +
> +		if (pm_genpd_add_subdomain(parent_domain, child_domain)) {
> +			dev_err(pmu->dev, "%s failed to add subdomain: %s\n",
> +				parent_domain->name, child_domain->name);
> +			goto err_out;
> +		} else {
> +			dev_info(pmu->dev, "%s add subdomain: %s\n",
> +				parent_domain->name, child_domain->name);
> +		}

s/dev_info/dev_dbg

CHECK: Alignment should match open parenthesis

#416: FILE: drivers/soc/rockchip/pm_domains.c:416:
+            dev_info(pmu->dev, "%s add subdomain: %s\n",
+                parent_domain->name, child_domain->name);

> +
> +		error = rockchip_pm_add_subdomain(pmu, np);
> +		if (error < 0)
> +			goto rm_sub_domain;
> +	}
> +	return 0;
> +
> +err_out:
> +	of_node_put(parent);
> +	of_node_put(np);
> +	return -EINVAL;
> +rm_sub_domain:
> +	pm_genpd_remove_subdomain(parent_domain, child_domain);
> +	return error;
> +}
> +
>   static int rockchip_pm_domain_probe(struct platform_device *pdev)
>   {
>   	struct device *dev = &pdev->dev;
> @@ -440,6 +497,13 @@ static int rockchip_pm_domain_probe(struct platform_device *pdev)
>   			of_node_put(node);
>   			goto err_out;
>   		}
> +
> +		error = rockchip_pm_add_subdomain(pmu, node);
> +		if (error < 0) {
> +			dev_err(dev, "failed to handle subdomain node %s: %d\n",
> +				node->name, error);
> +			goto err_out;
> +		}
>   	}
>   
>   	if (error) {


-- 
Thanks,
Caesar

[PATCH v5 4/6] dt/bindings: power: add RK3399 SoCs header for power-domain

[Caesar Wang]

? 2016?03?03? 16:03, Elaine Zhang ??:
> According to a description from TRM, add all the power domains
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> ---
>   include/dt-bindings/power/rk3399-power.h | 53 ++++++++++++++++++++++++++++++++
>   1 file changed, 53 insertions(+)
>   create mode 100644 include/dt-bindings/power/rk3399-power.h
>
> diff --git a/include/dt-bindings/power/rk3399-power.h b/include/dt-bindings/power/rk3399-power.h
> new file mode 100644
> index 0000000..69fbd67
> --- /dev/null
> +++ b/include/dt-bindings/power/rk3399-power.h
> @@ -0,0 +1,53 @@
> +#ifndef __DT_BINDINGS_POWER_RK3399_POWER_H__
> +#define __DT_BINDINGS_POWER_RK3399_POWER_H__
> +
> +/* VD_CORE_L */
> +#define RK3399_PD_A53_L0	0
> +#define RK3399_PD_A53_L1	1
> +#define RK3399_PD_A53_L2	2
> +#define RK3399_PD_A53_L3	3
> +#define RK3399_PD_SCU_L		4
> +
> +/* VD_CORE_B */
> +#define RK3399_PD_A72_B0	5
> +#define RK3399_PD_A72_B1	6
> +#define RK3399_PD_SCU_B		7
> +
> +/* VD_CENTER */
> +#define RK3399_PD_CENTER	8
> +#define RK3399_PD_VCODEC	9
> +#define RK3399_PD_RGA		10
> +#define RK3399_PD_IEP		11
> +#define RK3399_PD_VDU		12
> +
> +/* VD_LOGIC */
> +#define RK3399_PD_PERILP	13
> +#define RK3399_PD_PERIHP	14
> +#define RK3399_PD_VIO		15
> +#define RK3399_PD_VO		16
...
ISP?
> +#define RK3399_PD_VOPB		17
> +#define RK3399_PD_VOPL		18
> +#define RK3399_PD_ISP0		19
> +#define RK3399_PD_ISP1		20
> +#define RK3399_PD_HDCP		21
> +#define RK3399_PD_TCPD0		22
> +#define RK3399_PD_TCPD1		23
> +#define RK3399_PD_GIC		24
> +#define RK3399_PD_ALIVE		25
> +#define RK3399_PD_USB3		26
> +#define RK3399_PD_SD		27
> +#define RK3399_PD_CCI		28
> +#define RK3399_PD_CCI0		29
> +#define RK3399_PD_CCI1		30
> +#define RK3399_PD_GMAC		31
> +#define RK3399_PD_EMMC		32
> +#define RK3399_PD_EDP		33
> +#define RK3399_PD_SDIOAUDIO	34
> +
> +/* VD_GPU */
> +#define RK3399_PD_GPU		35
> +
> +/* VD_PMU */
> +#define RK3399_PD_PMU		36
> +

Would you please follow the TRM?



> +#endif


-- 
Thanks,
Caesar

[PATCH v5 6/6] rockchip: power-domain: Modify power domain driver for rk3399

[Caesar Wang]

? 2016?03?03? 16:09, Elaine Zhang ??:
> This driver is modified to support RK3399 SoC.
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

Reviewed-by: Caesar Wang  <wxt@rock-chips.com>

> ---
>   drivers/soc/rockchip/pm_domains.c | 55 +++++++++++++++++++++++++++++++++++++++
>   1 file changed, 55 insertions(+)
>
> diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
> index 1777e8e..8cdd877 100644
> --- a/drivers/soc/rockchip/pm_domains.c
> +++ b/drivers/soc/rockchip/pm_domains.c
> @@ -19,6 +19,7 @@
>   #include <linux/mfd/syscon.h>
>   #include <dt-bindings/power/rk3288-power.h>
>   #include <dt-bindings/power/rk3368-power.h>
> +#include <dt-bindings/power/rk3399-power.h>
>   
>   struct rockchip_domain_info {
>   	int pwr_mask;
> @@ -79,6 +80,9 @@ struct rockchip_pmu {
>   #define DOMAIN_RK3368(pwr, status, req)		\
>   	DOMAIN(pwr, status, req, (req) + 16, req)
>   
> +#define DOMAIN_RK3399(pwr, status, req)                \
> +	DOMAIN(pwr, status, req, req, req)
> +
>   static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd)
>   {
>   	struct rockchip_pmu *pmu = pd->pmu;
> @@ -535,6 +539,36 @@ static const struct rockchip_domain_info rk3368_pm_domains[] = {
>   	[RK3368_PD_GPU_1]	= DOMAIN_RK3368(17, 16, 2),
>   };
>   
> +static const struct rockchip_domain_info rk3399_pm_domains[] = {
> +	[RK3399_PD_TCPD0]	= DOMAIN_RK3399(8, 8, -1),
> +	[RK3399_PD_TCPD1]	= DOMAIN_RK3399(9, 9, -1),
> +	[RK3399_PD_CCI]	= DOMAIN_RK3399(10, 10, -1),
> +	[RK3399_PD_CCI0]	= DOMAIN_RK3399(-1, -1, 15),
> +	[RK3399_PD_CCI1]	= DOMAIN_RK3399(-1, -1, 16),
> +	[RK3399_PD_PERILP]	= DOMAIN_RK3399(11, 11, 1),
> +	[RK3399_PD_PERIHP]	= DOMAIN_RK3399(12, 12, 2),
> +	[RK3399_PD_CENTER]	= DOMAIN_RK3399(13, 13, 14),
> +	[RK3399_PD_VIO]	= DOMAIN_RK3399(14, 14, 17),
> +	[RK3399_PD_GPU]	= DOMAIN_RK3399(15, 15, 0),
> +	[RK3399_PD_VCODEC]	= DOMAIN_RK3399(16, 16, 3),
> +	[RK3399_PD_VDU]	= DOMAIN_RK3399(17, 17, 4),
> +	[RK3399_PD_RGA]	= DOMAIN_RK3399(18, 18, 5),
> +	[RK3399_PD_IEP]	= DOMAIN_RK3399(19, 19, 6),
> +	[RK3399_PD_VO]	= DOMAIN_RK3399(20, 20, -1),
> +	[RK3399_PD_VOPB]	= DOMAIN_RK3399(-1, -1, 7),
> +	[RK3399_PD_VOPL]	= DOMAIN_RK3399(-1, -1, 8),
> +	[RK3399_PD_ISP0]	= DOMAIN_RK3399(22, 22, 9),
> +	[RK3399_PD_ISP1]	= DOMAIN_RK3399(23, 23, 10),
> +	[RK3399_PD_HDCP]	= DOMAIN_RK3399(24, 24, 11),
> +	[RK3399_PD_GMAC]	= DOMAIN_RK3399(25, 25, 23),
> +	[RK3399_PD_EMMC]	= DOMAIN_RK3399(26, 26, 24),
> +	[RK3399_PD_USB3]	= DOMAIN_RK3399(27, 27, 12),
> +	[RK3399_PD_EDP]	= DOMAIN_RK3399(28, 28, 22),
> +	[RK3399_PD_GIC]	= DOMAIN_RK3399(29, 29, 27),
> +	[RK3399_PD_SD]	= DOMAIN_RK3399(30, 30, 28),
> +	[RK3399_PD_SDIOAUDIO]	= DOMAIN_RK3399(31, 31, 29),
> +};
> +
>   static const struct rockchip_pmu_info rk3288_pmu = {
>   	.pwr_offset = 0x08,
>   	.status_offset = 0x0c,
> @@ -569,6 +603,23 @@ static const struct rockchip_pmu_info rk3368_pmu = {
>   	.domain_info = rk3368_pm_domains,
>   };
>   
> +static const struct rockchip_pmu_info rk3399_pmu = {
> +	.pwr_offset = 0x14,
> +	.status_offset = 0x18,
> +	.req_offset = 0x60,
> +	.idle_offset = 0x64,
> +	.ack_offset = 0x68,
> +
> +	.core_pwrcnt_offset = 0x9c,
> +	.gpu_pwrcnt_offset = 0xa4,
> +
> +	.core_power_transition_time = 24,
> +	.gpu_power_transition_time = 24,
> +
> +	.num_domains = ARRAY_SIZE(rk3399_pm_domains),
> +	.domain_info = rk3399_pm_domains,
> +};
> +
>   static const struct of_device_id rockchip_pm_domain_dt_match[] = {
>   	{
>   		.compatible = "rockchip,rk3288-power-controller",
> @@ -578,6 +629,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = {
>   		.compatible = "rockchip,rk3368-power-controller",
>   		.data = (void *)&rk3368_pmu,
>   	},
> +	{
> +		.compatible = "rockchip,rk3399-power-controller",
> +		.data = (void *)&rk3399_pmu,
> +	},
>   	{ /* sentinel */ },
>   };
>   


-- 
Thanks,
Caesar

[PATCH v5 5/6] dt/bindings: rockchip: modify document of Rockchip power domains

[Caesar Wang]

? 2016?03?03? 16:09, Elaine Zhang ??:
> Add binding documentation for the power domains
> found on Rockchip RK3399 SoCs.
> RK3399 pd on/off not need to enable clk which in this pd.
> So remove the clocks in the rk3399 pd example.
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> ---
>   .../bindings/soc/rockchip/power_domain.txt         | 37 ++++++++++++++++++++++
>   1 file changed, 37 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
> index 13dc6a3..98085c8 100644
> --- a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
> +++ b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
> @@ -7,6 +7,7 @@ Required properties for power domain controller:
>   - compatible: Should be one of the following.
[....]
>   
>   Example of the node using power domain:
>   
> @@ -65,3 +96,9 @@ Example of the node using power domain:
>                   power-domains = <&power RK3368_PD_GPU_1>;
>                   /* ... */
>           };
> +
> +	node {
> +		/* ... */
> +		power-domains = <&power RK3399_PD_VOPB>;
> +		/* ... */
> +	};

Trivial: typo
                 power: power-controller {
@@ -92,10 +92,10 @@ Example of the node using power domain:
         };

         node {
-                /* ... */
-                power-domains = <&power RK3368_PD_GPU_1>;
-                /* ... */
-        };
+               /* ... */
+               power-domains = <&power RK3368_PD_GPU_1>;
+               /* ... */
+       };





-- 
Thanks,
Caesar

[PATCH v5 4/6] dt/bindings: power: add RK3399 SoCs header for power-domain

[Elaine Zhang]

On 03/08/2016 06:45 PM, Caesar Wang wrote:
>
>
> ? 2016?03?03? 16:03, Elaine Zhang ??:
>> According to a description from TRM, add all the power domains
>>
>> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
>> ---
>>   include/dt-bindings/power/rk3399-power.h | 53
>> ++++++++++++++++++++++++++++++++
>>   1 file changed, 53 insertions(+)
>>   create mode 100644 include/dt-bindings/power/rk3399-power.h
>>
>> diff --git a/include/dt-bindings/power/rk3399-power.h
>> b/include/dt-bindings/power/rk3399-power.h
>> new file mode 100644
>> index 0000000..69fbd67
>> --- /dev/null
>> +++ b/include/dt-bindings/power/rk3399-power.h
>> @@ -0,0 +1,53 @@
>> +#ifndef __DT_BINDINGS_POWER_RK3399_POWER_H__
>> +#define __DT_BINDINGS_POWER_RK3399_POWER_H__
>> +
>> +/* VD_CORE_L */
>> +#define RK3399_PD_A53_L0    0
>> +#define RK3399_PD_A53_L1    1
>> +#define RK3399_PD_A53_L2    2
>> +#define RK3399_PD_A53_L3    3
>> +#define RK3399_PD_SCU_L        4
>> +
>> +/* VD_CORE_B */
>> +#define RK3399_PD_A72_B0    5
>> +#define RK3399_PD_A72_B1    6
>> +#define RK3399_PD_SCU_B        7
>> +
>> +/* VD_CENTER */
>> +#define RK3399_PD_CENTER    8
>> +#define RK3399_PD_VCODEC    9
>> +#define RK3399_PD_RGA        10
>> +#define RK3399_PD_IEP        11
>> +#define RK3399_PD_VDU        12
>> +
>> +/* VD_LOGIC */
>> +#define RK3399_PD_PERILP    13
>> +#define RK3399_PD_PERIHP    14
>> +#define RK3399_PD_VIO        15
>> +#define RK3399_PD_VO        16
> ...
> ISP?
#define RK3399_PD_ISP0        19
#define RK3399_PD_ISP1        20

>> +#define RK3399_PD_VOPB        17
>> +#define RK3399_PD_VOPL        18
>> +#define RK3399_PD_ISP0        19
>> +#define RK3399_PD_ISP1        20
>> +#define RK3399_PD_HDCP        21
>> +#define RK3399_PD_TCPD0        22
>> +#define RK3399_PD_TCPD1        23
>> +#define RK3399_PD_GIC        24
>> +#define RK3399_PD_ALIVE        25
>> +#define RK3399_PD_USB3        26
>> +#define RK3399_PD_SD        27
>> +#define RK3399_PD_CCI        28
>> +#define RK3399_PD_CCI0        29
>> +#define RK3399_PD_CCI1        30
>> +#define RK3399_PD_GMAC        31
>> +#define RK3399_PD_EMMC        32
>> +#define RK3399_PD_EDP        33
>> +#define RK3399_PD_SDIOAUDIO    34
>> +
>> +/* VD_GPU */
>> +#define RK3399_PD_GPU        35
>> +
>> +/* VD_PMU */
>> +#define RK3399_PD_PMU        36
>> +
>
> Would you please follow the TRM?
Our pd group according to the voltage domain.Not nedd to follow the TRM.
>
>
>
>> +#endif
>
>

[PATCH v5 5/6] dt/bindings: rockchip: modify document of Rockchip power domains

[Elaine Zhang]

On 03/08/2016 07:09 PM, Caesar Wang wrote:
>
>
> ? 2016?03?03? 16:09, Elaine Zhang ??:
>> Add binding documentation for the power domains
>> found on Rockchip RK3399 SoCs.
>> RK3399 pd on/off not need to enable clk which in this pd.
>> So remove the clocks in the rk3399 pd example.
>>
>> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
>> ---
>>   .../bindings/soc/rockchip/power_domain.txt         | 37
>> ++++++++++++++++++++++
>>   1 file changed, 37 insertions(+)
>>
>> diff --git
>> a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
>> b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
>> index 13dc6a3..98085c8 100644
>> --- a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
>> +++ b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
>> @@ -7,6 +7,7 @@ Required properties for power domain controller:
>>   - compatible: Should be one of the following.
> [....]
>>   Example of the node using power domain:
>> @@ -65,3 +96,9 @@ Example of the node using power domain:
>>                   power-domains = <&power RK3368_PD_GPU_1>;
>>                   /* ... */
>>           };
>> +
>> +    node {
>> +        /* ... */
>> +        power-domains = <&power RK3399_PD_VOPB>;
>> +        /* ... */
>> +    };
>
> Trivial: typo
>                  power: power-controller {
> @@ -92,10 +92,10 @@ Example of the node using power domain:
>          };
>
>          node {
> -                /* ... */
> -                power-domains = <&power RK3368_PD_GPU_1>;
> -                /* ... */
> -        };
> +               /* ... */
> +               power-domains = <&power RK3368_PD_GPU_1>;
> +               /* ... */
> +       };
This is a example.I think there is no problem.

>
>
>
>
>

[PATCH v5 4/6] dt/bindings: power: add RK3399 SoCs header for power-domain

[Heiko Stübner]

Hi Caesar,

Am Dienstag, 8. M?rz 2016, 18:45:06 schrieb Caesar Wang:
> ? 2016?03?03? 16:03, Elaine Zhang ??:
> > According to a description from TRM, add all the power domains
> > 
> > Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> > ---
> > 
> >   include/dt-bindings/power/rk3399-power.h | 53
> >   ++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+)
> >   create mode 100644 include/dt-bindings/power/rk3399-power.h
> > 
> > diff --git a/include/dt-bindings/power/rk3399-power.h
> > b/include/dt-bindings/power/rk3399-power.h new file mode 100644
> > index 0000000..69fbd67
> > --- /dev/null
> > +++ b/include/dt-bindings/power/rk3399-power.h
> > @@ -0,0 +1,53 @@
> > +#ifndef __DT_BINDINGS_POWER_RK3399_POWER_H__
> > +#define __DT_BINDINGS_POWER_RK3399_POWER_H__
> > +
> > +/* VD_CORE_L */
> > +#define RK3399_PD_A53_L0	0
> > +#define RK3399_PD_A53_L1	1
> > +#define RK3399_PD_A53_L2	2
> > +#define RK3399_PD_A53_L3	3
> > +#define RK3399_PD_SCU_L		4
> > +
> > +/* VD_CORE_B */
> > +#define RK3399_PD_A72_B0	5
> > +#define RK3399_PD_A72_B1	6
> > +#define RK3399_PD_SCU_B		7
> > +
> > +/* VD_CENTER */
> > +#define RK3399_PD_CENTER	8
> > +#define RK3399_PD_VCODEC	9
> > +#define RK3399_PD_RGA		10
> > +#define RK3399_PD_IEP		11
> > +#define RK3399_PD_VDU		12
> > +
> > +/* VD_LOGIC */
> > +#define RK3399_PD_PERILP	13
> > +#define RK3399_PD_PERIHP	14
> > +#define RK3399_PD_VIO		15
> > +#define RK3399_PD_VO		16
> 
> ...
> ISP?
> 
> > +#define RK3399_PD_VOPB		17
> > +#define RK3399_PD_VOPL		18
> > +#define RK3399_PD_ISP0		19
> > +#define RK3399_PD_ISP1		20
> > +#define RK3399_PD_HDCP		21
> > +#define RK3399_PD_TCPD0		22
> > +#define RK3399_PD_TCPD1		23
> > +#define RK3399_PD_GIC		24
> > +#define RK3399_PD_ALIVE		25
> > +#define RK3399_PD_USB3		26
> > +#define RK3399_PD_SD		27
> > +#define RK3399_PD_CCI		28
> > +#define RK3399_PD_CCI0		29
> > +#define RK3399_PD_CCI1		30
> > +#define RK3399_PD_GMAC		31
> > +#define RK3399_PD_EMMC		32
> > +#define RK3399_PD_EDP		33
> > +#define RK3399_PD_SDIOAUDIO	34
> > +
> > +/* VD_GPU */
> > +#define RK3399_PD_GPU		35
> > +
> > +/* VD_PMU */
> > +#define RK3399_PD_PMU		36
> > +
> 
> Would you please follow the TRM?

could you elaborate a bit on what you mean?

Looking at the "Table 11-1 RK3399 Power Domain and Voltage Domain Summary" in 
the TRM, Elaine's list seems to match that table quite nicely, so looks ok to 
me at first glance.


Heiko

[PATCH v5 4/6] dt/bindings: power: add RK3399 SoCs header for power-domain

[Caesar Wang]

Hi Heiko & Elain,

? 2016?03?09? 17:55, Heiko St?bner ??:
> Hi Caesar,
>
> Am Dienstag, 8. M?rz 2016, 18:45:06 schrieb Caesar Wang:
>> ? 2016?03?03? 16:03, Elaine Zhang ??:
>>> According to a description from TRM, add all the power domains
>>>
>>> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
>>> ---
>>>
>>>    include/dt-bindings/power/rk3399-power.h | 53
>>>    ++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+)
>>>    create mode 100644 include/dt-bindings/power/rk3399-power.h
>>>
>>> diff --git a/include/dt-bindings/power/rk3399-power.h
>>> b/include/dt-bindings/power/rk3399-power.h new file mode 100644
>>> index 0000000..69fbd67
>>> --- /dev/null
>>> +++ b/include/dt-bindings/power/rk3399-power.h
>>> @@ -0,0 +1,53 @@
>>> +#ifndef __DT_BINDINGS_POWER_RK3399_POWER_H__
>>> +#define __DT_BINDINGS_POWER_RK3399_POWER_H__
>>> +
>>> +/* VD_CORE_L */
>>> +#define RK3399_PD_A53_L0	0
>>> +#define RK3399_PD_A53_L1	1
>>> +#define RK3399_PD_A53_L2	2
>>> +#define RK3399_PD_A53_L3	3
>>> +#define RK3399_PD_SCU_L		4
>>> +
>>> +/* VD_CORE_B */
>>> +#define RK3399_PD_A72_B0	5
>>> +#define RK3399_PD_A72_B1	6
>>> +#define RK3399_PD_SCU_B		7
>>> +
>>> +/* VD_CENTER */
>>> +#define RK3399_PD_CENTER	8
>>> +#define RK3399_PD_VCODEC	9
>>> +#define RK3399_PD_RGA		10
>>> +#define RK3399_PD_IEP		11
>>> +#define RK3399_PD_VDU		12
>>> +
>>> +/* VD_LOGIC */
>>> +#define RK3399_PD_PERILP	13
>>> +#define RK3399_PD_PERIHP	14
>>> +#define RK3399_PD_VIO		15
>>> +#define RK3399_PD_VO		16
>> ...
>> ISP?
>>
>>> +#define RK3399_PD_VOPB		17
>>> +#define RK3399_PD_VOPL		18
>>> +#define RK3399_PD_ISP0		19
>>> +#define RK3399_PD_ISP1		20
>>> +#define RK3399_PD_HDCP		21
>>> +#define RK3399_PD_TCPD0		22
>>> +#define RK3399_PD_TCPD1		23
>>> +#define RK3399_PD_GIC		24
>>> +#define RK3399_PD_ALIVE		25
>>> +#define RK3399_PD_USB3		26
>>> +#define RK3399_PD_SD		27
>>> +#define RK3399_PD_CCI		28
>>> +#define RK3399_PD_CCI0		29
>>> +#define RK3399_PD_CCI1		30
>>> +#define RK3399_PD_GMAC		31
>>> +#define RK3399_PD_EMMC		32
>>> +#define RK3399_PD_EDP		33
>>> +#define RK3399_PD_SDIOAUDIO	34
>>> +
>>> +/* VD_GPU */
>>> +#define RK3399_PD_GPU		35
>>> +
>>> +/* VD_PMU */
>>> +#define RK3399_PD_PMU		36
>>> +
>> Would you please follow the TRM?
> could you elaborate a bit on what you mean?
>
> Looking at the "Table 11-1 RK3399 Power Domain and Voltage Domain Summary" in
> the TRM, Elaine's list seems to match that table quite nicely, so looks ok to
> me at first glance.

That's also trivial...

The comments from the first time I saw this file and TRM.:-)

Can we define the lists according to order the TRM?

For example:

+/* VD_CORE_L */
+#define RK3399_PD_A53_L0	0
+#define RK3399_PD_A53_L1	1
+#define RK3399_PD_A53_L2	2
+#define RK3399_PD_A53_L3	3
+#define RK3399_PD_SCU_L	4
+
+/* VD_CORE_B */
+#define RK3399_PD_A72_B0	5
+#define RK3399_PD_A72_B1	6
+#define RK3399_PD_SCU_B	7
+
+/* VD_LOGIC */
+#define RK3399_PD_PERILP	13
+#define RK3399_PD_PERIHP	14
+#define RK3399_PD_VIO		15
+#define RK3399_PD_ISP0		16
+#define RK3399_PD_ISP1		17
+#define RK3399_PD_VO		18
+#define RK3399_PD_HDCP	19
+#define RK3399_PD_TCPD0	20
+#define RK3399_PD_TCPD1	21
.....

+/* VD_CENTER */
....

+/* VD_GPU */
....

+/* VD_PMU */


Please ignore it and sorry the noise if that's the wrong ideas.:-)



>
>
> Heiko
>

-- 
Thanks,
Caesar

[PATCH v5 4/6] dt/bindings: power: add RK3399 SoCs header for power-domain

[Heiko Stübner]

Hi Caesar,

Am Mittwoch, 9. M?rz 2016, 18:36:26 schrieb Caesar Wang:
> ? 2016?03?09? 17:55, Heiko St?bner ??:
> > Hi Caesar,
> > 
> > Am Dienstag, 8. M?rz 2016, 18:45:06 schrieb Caesar Wang:
> >> ? 2016?03?03? 16:03, Elaine Zhang ??:
> >>> According to a description from TRM, add all the power domains
> >>> 
> >>> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> >>> ---
> >>> 
> >>>    include/dt-bindings/power/rk3399-power.h | 53
> >>>    ++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+)
> >>>    create mode 100644 include/dt-bindings/power/rk3399-power.h
> >>> 
> >>> diff --git a/include/dt-bindings/power/rk3399-power.h
> >>> b/include/dt-bindings/power/rk3399-power.h new file mode 100644
> >>> index 0000000..69fbd67
> >>> --- /dev/null
> >>> +++ b/include/dt-bindings/power/rk3399-power.h
> >>> @@ -0,0 +1,53 @@
> >>> +#ifndef __DT_BINDINGS_POWER_RK3399_POWER_H__
> >>> +#define __DT_BINDINGS_POWER_RK3399_POWER_H__
> >>> +
> >>> +/* VD_CORE_L */
> >>> +#define RK3399_PD_A53_L0	0
> >>> +#define RK3399_PD_A53_L1	1
> >>> +#define RK3399_PD_A53_L2	2
> >>> +#define RK3399_PD_A53_L3	3
> >>> +#define RK3399_PD_SCU_L		4
> >>> +
> >>> +/* VD_CORE_B */
> >>> +#define RK3399_PD_A72_B0	5
> >>> +#define RK3399_PD_A72_B1	6
> >>> +#define RK3399_PD_SCU_B		7
> >>> +
> >>> +/* VD_CENTER */
> >>> +#define RK3399_PD_CENTER	8
> >>> +#define RK3399_PD_VCODEC	9
> >>> +#define RK3399_PD_RGA		10
> >>> +#define RK3399_PD_IEP		11
> >>> +#define RK3399_PD_VDU		12
> >>> +
> >>> +/* VD_LOGIC */
> >>> +#define RK3399_PD_PERILP	13
> >>> +#define RK3399_PD_PERIHP	14
> >>> +#define RK3399_PD_VIO		15
> >>> +#define RK3399_PD_VO		16
> >> 
> >> ...
> >> ISP?
> >> 
> >>> +#define RK3399_PD_VOPB		17
> >>> +#define RK3399_PD_VOPL		18
> >>> +#define RK3399_PD_ISP0		19
> >>> +#define RK3399_PD_ISP1		20
> >>> +#define RK3399_PD_HDCP		21
> >>> +#define RK3399_PD_TCPD0		22
> >>> +#define RK3399_PD_TCPD1		23
> >>> +#define RK3399_PD_GIC		24
> >>> +#define RK3399_PD_ALIVE		25
> >>> +#define RK3399_PD_USB3		26
> >>> +#define RK3399_PD_SD		27
> >>> +#define RK3399_PD_CCI		28
> >>> +#define RK3399_PD_CCI0		29
> >>> +#define RK3399_PD_CCI1		30
> >>> +#define RK3399_PD_GMAC		31
> >>> +#define RK3399_PD_EMMC		32
> >>> +#define RK3399_PD_EDP		33
> >>> +#define RK3399_PD_SDIOAUDIO	34
> >>> +
> >>> +/* VD_GPU */
> >>> +#define RK3399_PD_GPU		35
> >>> +
> >>> +/* VD_PMU */
> >>> +#define RK3399_PD_PMU		36
> >>> +
> >> 
> >> Would you please follow the TRM?
> > 
> > could you elaborate a bit on what you mean?
> > 
> > Looking at the "Table 11-1 RK3399 Power Domain and Voltage Domain Summary"
> > in the TRM, Elaine's list seems to match that table quite nicely, so
> > looks ok to me at first glance.
> 
> That's also trivial...
> 
> The comments from the first time I saw this file and TRM.:-)
> 
> Can we define the lists according to order the TRM?
> 
> For example:
> 
> +/* VD_CORE_L */
> +#define RK3399_PD_A53_L0	0
> +#define RK3399_PD_A53_L1	1
> +#define RK3399_PD_A53_L2	2
> +#define RK3399_PD_A53_L3	3
> +#define RK3399_PD_SCU_L	4
> +
> +/* VD_CORE_B */
> +#define RK3399_PD_A72_B0	5
> +#define RK3399_PD_A72_B1	6
> +#define RK3399_PD_SCU_B	7
> +
> +/* VD_LOGIC */
> +#define RK3399_PD_PERILP	13
> +#define RK3399_PD_PERIHP	14
> +#define RK3399_PD_VIO		15
> +#define RK3399_PD_ISP0		16
> +#define RK3399_PD_ISP1		17
> +#define RK3399_PD_VO		18
> +#define RK3399_PD_HDCP	19
> +#define RK3399_PD_TCPD0	20
> +#define RK3399_PD_TCPD1	21
> .....
> 
> +/* VD_CENTER */
> ....
> 
> +/* VD_GPU */
> ....
> 
> +/* VD_PMU */
> 
> 
> Please ignore it and sorry the noise if that's the wrong ideas.:-)

I may be simply be blind, but I don't see the difference .... ah no, now I see 
it, some voltage domains are swapped in the original (VD_CENTER before 
VD_LOGIC, while in the TRM it's the other way around).

So while it doesn't matter much, I would slightly prefer the ordering being 
according to the TRM table. Reason is the same as for ordering the clock-tree 
according to the diagrams - it makes future reading easier ;-)


Heiko